ARM pagetable setting in Linux

[Wang, Yalin]

Hi  Will,

I have a question about  arm pagetable setting in Linux .

From armV6,  there is TTBR0 and TTBR1  translation base address registers  in mmu .
But I  found linux only use TTBR0 for translation base address ,
Could we use TTBR0 and TTBR1 to split user task and kernel pagetables (swapper_pg_dir)ï 

But I found this need set TTBCR.N   ,
If PAGE_OFFSET==0xc0000000  ,   set TTBCR.N=0x2 ,
Will not work , because   only ensure 0--0x00FFFFFF  MVA use TTBCR0 
And other  MVAãwill use TTBCR1 ,
But if we set PAGE_OFFSET==0x80000000  (2GB split )  ,
And set  TTBCR.N=0x1 ,
This will make sure user task MVA use TTBCR0 and kernel  MVA 
Use TTBCR1 , this  will make some improvement for the system .

1. Because we donât need copy kernel first âlevel pagetables into every 
User taskâs pagetables and flush tlb (for example fork() a new process).

2. And donât need handle kernel page fault because that user taskâs kernel 
Pagetable when it is not set up , need copy again( for example vmalloc()  ioremap()  kmap()  will change 
Kernel pagetables and need update to every task pagetables ) .

3. We  even can only allocate 8KB first level pagetables for user task to save 
Memorys .


I am not  sure if its possible to implement this on cortex-A  cpus ?
And if there is some side effects if we use this in linux ?

If possible ,  I can make a change to do some test .

Thanks for your help .







Yalin.Wang
Software Engineer 
OS Kernel&Graphics
Â
Sony Mobile Communications
Tel: +86 10 5966 9819
Phone: 18610323092
Address: No.16 Guangshun South Street, Chaoyang, Beijing, P.R.C.

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