Re: [RFC] gcc feature request: Moving blocks into sections

From: Mathieu Desnoyers
Date: Mon Aug 05 2013 - 18:08:45 EST


* Steven Rostedt (rostedt@xxxxxxxxxxx) wrote:
> On Mon, 2013-08-05 at 17:28 -0400, Mathieu Desnoyers wrote:
>
[...]
> > My though is that the code above does not cover all jump encodings that
> > can be generated by past, current and future x86 assemblers.
> >
> > Another way around this issue might be to keep the instruction size
> > within a non-allocated section:
> >
> > static __always_inline bool arch_static_branch(struct static_key *key)
> > {
> > asm goto("1:"
> > "jmp %l[l_yes]\n\t"
> > "2:"
> >
> > ".pushsection __jump_table, \"aw\" \n\t"
> > _ASM_ALIGN "\n\t"
> > _ASM_PTR "1b, %l[l_yes], %c0 \n\t"
> > ".popsection \n\t"
> >
> > ".pushsection __jump_table_ilen \n\t"
> > _ASM_PTR "1b \n\t" /* Address of the jmp */
> > ".byte 2b - 1b \n\t" /* Size of the jmp instruction */
> > ".popsection \n\t"
> >
> > : : "i" (key) : : l_yes);
> > return false;
> > l_yes:
> > return true;
> > }
> >
> > And use (2b - 1b) to know what size of no-op should be used rather than
> > to rely on instruction decoding.
> >
> > Thoughts ?
> >
>
> Then we need to add yet another table of information to the kernel that
> needs to hang around. This goes with another kernel-discuss request
> talking about kernel data bloat.

Perhaps this section could be simply removed by the post-link stage ?

Thanks,

Mathieu

>
> -- Steve
>
>

--
Mathieu Desnoyers
EfficiOS Inc.
http://www.efficios.com
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