[PATCH 0/2] serial: omap: improve performance for RS-485

From: Philippe Proulx
Date: Wed Oct 23 2013 - 18:50:45 EST


The current RS-485 implementation for the OMAP serial driver is to not
disable THR interrupts when the driver ring buffer becomes empty until
it makes sure the TX shift register is empty, which means the UART is
not transmitting anymore and only then can the driver toggle the GPIO
output pin for RS-485 data direction.

Since the UART TX FIFO trigger level is set to 32 characters (the
comment said 16, but it's really 32), this means there's a burst of IRQs
for the transmission time of 33 characters (which means at least 34 ms
at 9600 bauds, for example) since the TX FIFO is always below its
trigger level and the THR interrupts are not disabled. The driver is
essentially polling the status bit using interrupts during this time.

This patchset makes use of the TXEMPTYCTLIT bit of the SCR register
instead, which makes it possible to get a THR interrupt only when both
the TX FIFO and the TX shift register are empty. We only use this mode
if RS-485 is enabled.

This patchset also fixes a few minor coding style warnings from
checkpatch.pl.

The patches apply to tty/tty-next.

Philippe Proulx (2):
serial: omap: improve RS-485 performance
serial: omap: fix a few checkpatch warnings

drivers/tty/serial/omap-serial.c | 67 +++++++++++++++++++++++++++-------------
1 file changed, 46 insertions(+), 21 deletions(-)

--
1.8.4.1

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