Re: perf events ring buffer memory barrier on powerpc
From: Paul E. McKenney
Date: Sun Nov 03 2013 - 00:05:25 EST
On Fri, Nov 01, 2013 at 03:56:34PM +0100, Peter Zijlstra wrote:
> On Wed, Oct 30, 2013 at 11:40:15PM -0700, Paul E. McKenney wrote:
> > > Now the whole crux of the question is if we need barrier A at all, since
> > > the STORES issued by the @buf writes are dependent on the ubuf->tail
> > > read.
> > The dependency you are talking about is via the "if" statement?
> > Even C/C++11 is not required to respect control dependencies.
> > This one is a bit annoying. The x86 TSO means that you really only
> > need barrier(), ARM (recent ARM, anyway) and Power could use a weaker
> > barrier, and so on -- but smp_mb() emits a full barrier.
> > Perhaps a new smp_tmb() for TSO semantics, where reads are ordered
> > before reads, writes before writes, and reads before writes, but not
> > writes before reads? Another approach would be to define a per-arch
> > barrier for this particular case.
> I suppose we can only introduce new barrier primitives if there's more
> than 1 use-case.
There probably are others.
> > > If the read shows no available space, we simply will not issue those
> > > writes -- therefore we could argue we can avoid the memory barrier.
> > Proving that means iterating through the permitted combinations of
> > compilers and architectures... There is always hand-coded assembly
> > language, I suppose.
> I'm starting to think that while the C/C++ language spec says they can
> wreck the world by doing these silly optimization, real world users will
> push back for breaking their existing code.
> I'm fairly sure the GCC people _will_ get shouted at _loudly_ when they
> break the kernel by doing crazy shit like that.
> Given its near impossible to write a correct program in C/C++ and
> tagging the entire kernel with __atomic is equally not going to happen,
> I think we must find a practical solution.
> Either that, or we really need to consider forking the language and
> compiler :-(
Depends on how much benefit the optimizations provide. If they provide
little or no benefit, I am with you, otherwise we will need to bit some
bullet or another. Keep in mind that there is a lot of code in the
kernel that runs sequentially (e.g., due to being fully protected by
locks), and aggressive optimizations for that sort of code are harmless.
Can't say I know the answer at the moment, though.
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