Re: [PATCH 7/7] ipc,msg: document barriers

[Mike Galbraith]

On Fri, 2014-01-10 at 10:48 -0800, Davidlohr Bueso wrote: 
> Both expunge_all() and pipeline_send() rely on both a nil msg value and a
> full barrier to guarantee the correct ordering when waking up a task. While
> its counter part at the receiving end is well documented for the lockless
> recv algorithm, we still need to document these specific smp_mb() calls.
> 
> Signed-off-by: Davidlohr Bueso <davidlohr@xxxxxx>
> ---
>  ipc/msg.c | 19 +++++++++++++++++--
>  1 file changed, 17 insertions(+), 2 deletions(-)
> 
> diff --git a/ipc/msg.c b/ipc/msg.c
> index 4377f4a..8c1cc76 100644
> --- a/ipc/msg.c
> +++ b/ipc/msg.c
> @@ -253,8 +253,14 @@ static void expunge_all(struct msg_queue *msq, int res)
>  	struct msg_receiver *msr, *t;
>  
>  	list_for_each_entry_safe(msr, t, &msq->q_receivers, r_list) {
> -		msr->r_msg = NULL;
> +		msr->r_msg = NULL; /* initialize expunge ordering */
>  		wake_up_process(msr->r_tsk);
> +		/*
> +		 * Ensure that the wakeup is visible before setting r_msg as
> +		 * the receiving end depends on it: either spinning on a nil,
> +		 * or dealing with -EAGAIN cases. See lockless reveice part 1
                                                                 ^^^^^^^ lysdexic fingers

> +		 * and 2 in do_msgrcv().
> +		 */
>  		smp_mb();
>  		msr->r_msg = ERR_PTR(res);
>  	}
> @@ -638,15 +644,22 @@ static inline int pipelined_send(struct msg_queue *msq, struct msg_msg *msg)
>  
>  			list_del(&msr->r_list);
>  			if (msr->r_maxsize < msg->m_ts) {
> +				/* initialize pipelined send ordering */
>  				msr->r_msg = NULL;
>  				wake_up_process(msr->r_tsk);
> -				smp_mb();
> +				smp_mb(); /* see barrier comment below */
>  				msr->r_msg = ERR_PTR(-E2BIG);
>  			} else {
>  				msr->r_msg = NULL;
>  				msq->q_lrpid = task_pid_vnr(msr->r_tsk);
>  				msq->q_rtime = get_seconds();
>  				wake_up_process(msr->r_tsk);
> +				/*
> +				 * Ensure that the wakeup is visible before
> +				 * setting r_msg, as the receiving end depends
> +				 * on it. See lockless reveice part 1 and 2 in
                                                         ^^^^^^^ ditto



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