RE: [PATCH v4] can: xilinx CAN controller support.

[Appana Durga Kedareswara Rao]

Hi Marc,


> -----Original Message-----
> From: Marc Kleine-Budde [mailto:mkl@xxxxxxxxxxxxxx]
> Sent: Friday, February 28, 2014 6:45 PM
> To: Appana Durga Kedareswara Rao; wg@xxxxxxxxxxxxxx; Michal Simek;
> grant.likely@xxxxxxxxxx; robh+dt@xxxxxxxxxx; linux-can@xxxxxxxxxxxxxxx
> Cc: netdev@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; linux-
> kernel@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx
> Subject: Re: [PATCH v4] can: xilinx CAN controller support.
>
> On 02/28/2014 02:07 PM, Appana Durga Kedareswara Rao wrote:
> >>>> What happens if the interrupt handler is delayed? For example in a
> >>>> RT enabled system the interrupt handler runs as a thread. There
> >>>> might be other threads with higher priority. The hardware will
> >>>> probably send all CAN frames in the FIFO, so you want to reduce the
> >>>> overhead and loop in the tx complete handler.
> >>>>
> >>> Yes I agree with your comment.
> >>> It will be good to have a loop in the Tx interrupt handler I am
> >>> modifying the Tx interrupt handler like below.
> >>>
> >>> static void xcan_tx_interrupt(struct net_device *ndev, u32 isr) {
> >>>         struct xcan_priv *priv = netdev_priv(ndev);
> >>>         struct net_device_stats *stats = &ndev->stats;
> >>>
> >>>         while (priv->tx_head - priv->tx_tail > 0) {
> >>>                 if (!(isr & XCAN_IXR_TXOK_MASK)) {
> >>>                         break;
> >>>                 }
> >>>                 can_get_echo_skb(ndev, priv->tx_tail %
> >>>                                         priv->xcan_echo_skb_max_tx);
> >>>                 priv->tx_tail++;
> >>>                 stats->tx_packets++;
> >>>                 can_led_event(ndev, CAN_LED_EVENT_TX);
>
> Probably first clear the interrupt, because you've just handled it, then check
> if it's still present. The question is, do you have to clear the IRQ for each
> transmitted frame, or does one clean of the interrupt clear the bit for more
> then one transmitted frame?
>

We already were clearing it in the interrupt routine (xcan_interrupt). That's why clearing it at the end of the loop.
We have to clear the IRQ (TXOK) for each transmitted frame.

Regards,
Kedar.


> >>>                 isr = priv->read_reg(priv, XCAN_ISR_OFFSET);
> >             --> clear Tx OK interrupt.
>
> >
> >>>         }
> >>>         netif_wake_queue(ndev);
> >>> }
> >>>
> >>> Are you Ok with this?
>
> Were getting there :)
>
> Marc
> --
> Pengutronix e.K.                  | Marc Kleine-Budde           |
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