Re: uhci_hcd: DMA-API: cpu touching an active dma mapped cacheline

[Alan Stern]

On Thu, 6 Mar 2014, Dan Williams wrote:

> >>> Mapped at:
> >>>  [<c13081b5>] debug_dma_alloc_coherent+0x2b/0xc3
> >>>  [<c116fcee>] dma_pool_alloc+0x14f/0x2fd
> >>>  [<c1456eaa>] uhci_alloc_td.isra.35+0x24/0x60
> >>>  [<c1457fa6>] uhci_start+0x272/0x56b
> >>>  [<c142d8fb>] usb_add_hcd+0x252/0x774
> >>
> >> I don't get it.  As the name indicates, debug_dma_alloc_coherent should
> >> give us consistent memory -- meaning that the CPU is allowed to access
> >> the memory while DMA is in progress, without worrying about caching
> >> effects (see Documentation/DMA-API.txt).
> >>
> >> So why should we get a warning when the CPU accesses this memory?  Is
> >> this a regression in the DMA debug library?
> >
> > Yes, it seems so.  alloc_coherent needs to be exempt from active
> > mapping tracking.  Fix coming up.
> >
> 
> Actually I'm not so sure.  Yes, alloc_coherent means the cpu can
> touch, but if that page is COW'd how can you be sure that the copy
> gets the most up to date data from the device?  This check is
> asserting that dma might be colliding with a copy-on-write event.

dma_pool_create should never return memory that requires COW.  How 
would the system know when to do the copies?

Alan Stern

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