RE: [PATCH V2] iommu/amd: Fix logic to determine and checking max PASID

[Cornwall, Jay]

Joerg Roedel wrote:

>On Wed, Mar 05, 2014 at 06:54:18PM -0600, suravee.suthikulpanit@xxxxxxx wrote:
>> From: Suravee Suthikulpanit <suravee.suthikulpanit@xxxxxxx>
>> 
>> In reality, the spec can only support 16-bit PASID since 
>> INVALIDATE_IOTLB_PAGES and COMPLETE_PPR_REQUEST commands only allow 
>> 16-bit PASID. So, we updated the PASID_MASK accordingly and invoke 
>>BUG_ON if the hardware is reporting PASmax more than 16-bit.
>> 
>>Besides, max PASID is defined as ((2^(PASmax+1)) - 1). The current 
>> does not determine this correctly.
>> 
>> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@xxxxxxx>
>> Tested-by: Jay Cornwall <Jay.Cornwall@xxxxxxx>
> 
> Applied, thanks.
> 
> Btw, is there any publicly available driver/way/whatever for me to test the AMD IOMMUv2 code paths?

We are testing on a kernel development branch which enables ATS translation from shaders on the Kaveri APU. See drivers/gpu/hsa/radeon at http://cgit.freedesktop.org/~gabbayo/linux/ for the kernel driver.

Testing requires some setup in user mode to construct a PM4 command stream and CIK assembly, similar to the DRM/Mesa UMD implementation. Even then, it is not possible to observe translations directly. Our testing is limited to indirect observations; e.g. modifying VA:PA mappings and ensuring shader loads/stores reflect expected results.

I don't know of a way to exercise the IOMMUv2 code paths without an IOTLB client.

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