Re: [PATCH 06/20] arch,avr32: Fold atomic_ops

From: Hans-Christian Egtvedt
Date: Wed May 14 2014 - 03:43:18 EST


Around Tue 13 May 2014 22:50:45 +0200 or thereabout, Peter Zijlstra wrote:
> On Tue, May 13, 2014 at 10:40:32PM +0200, Hans-Christian Egtvedt wrote:
>> Probably found the reason why we want to use sub with the signed 21-bit
>> limit, it uses one less register than the add instruction that can add up to
>> 32-bit values.
>>
>> Both instructions are 32-bit, to use a 16-bit instruction the immediate is
>> very small; 4 bit.
>>
>> sub 32-bit, type IV, takes a register and subtracts a 21-bit immediate.
>> add 32-bit, type II, adds two register values together.
>>
>> So by simplifying you loose this optimization.
>
> OK, let me try if I can come up with anything sane for this.
>
> Re, adding atomic_{or,and,xor}() those should all use the same bits as
> add, right, except for the special case using sub.

OR and XOR (EOR in the manual) instruction will fall into type II or III,
both 32-bit, and (x)ors two registers together, difference is which way they
can do a shift on one of the registers.

So yes, identical as add.

--
Hans-Christian Egtvedt
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