Re: [PATCH v2] devicetree: Add generic IOMMU device tree bindings

From: Thierry Reding
Date: Wed Jun 04 2014 - 17:01:04 EST

On Wed, Jun 04, 2014 at 05:41:32PM +0100, Will Deacon wrote:
> On Wed, Jun 04, 2014 at 03:35:10PM +0100, Thierry Reding wrote:
> > On Mon, Jun 02, 2014 at 11:41:04AM +0100, Dave Martin wrote:
> > > In the strictest sense, no.
> > >
> > > But for a large set of sane configurations, this probably works.
> > >
> > > Small sets of randomly-assigned IDs can just be enumerated one by one.
> > >
> > > We wouldn't be able to describe folding and bit shuffling, but we
> > > probably don't want to encourage that anyway.
> >
> > I'm having some difficulty understanding this. You make it sound like
> > there's a fairly arbitrary number of IDs that the SMMU can handle. So
> > how is the mapping to devices defined? If you say encourage that does
> > make it sound like the assignment of IDs is purely defined by some
> > mechanism in software rather than in hardware. Or they are more or less
> > randomly picked by someone. If that's the case, is that not something
> > that should be dynamically allocated by the kernel rather than put into
> > the device tree?
> The set of StreamIDs that can be generated by a master is fixed in the
> hardware. The SMMU can then be programmed to map these incoming IDs onto
> a context ID (or a set of context IDs), which are the IDs used internally
> by the SMMU to find the page tables etc.
> The StreamID -> ContextID mapping is dynamic and controlled by software.
> The Master -> StreamIDs mapping is fixed in the hardware.

Okay, that sounds similar to what the Tegra SMMU does. The naming is
slightly differently. "Master" is called "memory client", "StreamID"
would be "SWGROUP" and "ContextID" I guess would map to what's called an
"ASID" (Address Space ID) on Tegra.

I'm not sure about the amount of leverage that we have to encourage the
mappings that we think are easy to describe in DT and discourage those
that we don't want. Last time I checked we were still playing catch up
rather than being able to give recommendations to hardware engineers
about what will result in sane DT content and what won't.

Irrespective of the above, I still think that a generic binding based on
an #iommu-cells and iommus property gives us the most flexibility. For
easy cases, most of which are listed in the current proposal could
easily be dealt with in convenience helpers. For the more complex cases
drivers for those IOMMUs can define a specifier that make sense for the
mappings they need to be able to describe.

Also we're talking about a generic IOMMU binding here. That means that
if some hardware comes along that's not "generic" and doesn't fit into
the constraints set by this binding, then we still have the option of
defining a completely different one for that particular case.


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