Re: [PATCH v2 2/5] perf/x86: add support for sampling PEBS machine state registers

[Stephane Eranian]

On Tue, Jul 15, 2014 at 4:29 PM, Peter Zijlstra <peterz@xxxxxxxxxxxxx> wrote:
> On Tue, Jul 15, 2014 at 02:31:41AM +0200, Stephane Eranian wrote:
>> PEBS can capture machine state regs at retiremnt of the sampled
>> instructions. When precise sampling is enabled on an event, PEBS
>> is used, so substitute the interrupted state with the PEBS state.
>> Note that not all registers are captured by PEBS. Those missing
>> are replaced by the interrupt state counter-parts.
>>
>> Signed-off-by: Stephane Eranian <eranian@xxxxxxxxxx>
>> ---
>>  arch/x86/kernel/cpu/perf_event_intel_ds.c |   19 +++++++++++++++++++
>>  1 file changed, 19 insertions(+)
>>
>> diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
>> index 980970c..d612bcd 100644
>> --- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
>> +++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
>> @@ -925,6 +925,25 @@ static void __intel_pmu_pebs_event(struct perf_event *event,
>>       regs.bp = pebs->bp;
>>       regs.sp = pebs->sp;
>>
>> +     if (sample_type & PERF_SAMPLE_REGS_INTR) {
>> +             regs.ax = pebs->ax;
>> +             regs.bx = pebs->bx;
>> +             regs.cx = pebs->cx;
>> +             regs.si = pebs->si;
>> +             regs.di = pebs->di;
>> +
>> +             regs.r8 = pebs->r8;
>> +             regs.r9 = pebs->r9;
>> +             regs.r10 = pebs->r10;
>> +             regs.r11 = pebs->r11;
>> +             regs.r12 = pebs->r12;
>> +             regs.r13 = pebs->r13;
>> +             regs.r14 = pebs->r14;
>> +             regs.r14 = pebs->r15;
>> +
>> +             data.regs_intr.regs = &regs;
>
> This last assignment is superfluous. Note how you previous patch's
> perf_sample_regs_intr() is unconditionally writing its .regs value, and
> in turn, perf_sample_regs_intr() is called unconditionally from
> perf_prepare_sample().
>
Ok, I will remove it.
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