Re: [Xen-devel] [V1 PATCH 1/2] PVH: set EFER.NX and EFER.SCE for boot vcpu
From: David Vrabel
Date: Thu Aug 28 2014 - 10:18:33 EST
On 27/08/14 23:33, Mukesh Rathor wrote:
> This patch addresses three things for a pvh boot vcpu:
> - NX bug on intel: It was recenlty discovered that NX is not being
> honored in PVH on intel since EFER.NX is not being set. The pte.NX
> bits are ignored if EFER.NX is not set on intel.
I am unconvinced by this explanation. The Intel SDM clearly states that
the XD bit in the page table entries is reserved if EFER.NXE is clear,
and thus using a entry with XD set and EFER.NXE clear should generate a
page fault (same as AMD).
You either need to find out why Intel really worked (perhaps Xen is
setting EFER.NXE on Intel?) or you need to included an errata (or
> - PVH boot hang on newer xen: Following c/s on xen
> c/s 7645640: x86/PVH: don't set EFER_SCE for pvh guest
As I already explained in another email, the Xen change caused a
regression and must be reverted.
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