Re: [PATCH] x86, lpc, Allow only one load of lpc_ich
From: Peter Tyser
Date: Wed Sep 03 2014 - 15:15:09 EST
> > Can you give more background on your hardware and firmware setup?
> Unfortunately I cannot :( The system isn't "mine" per se. It is (as the
> dumps show) IBM's.
Can you look at the IBM manual and see info about which chipsets are used, and
how they are connected?
> Are there
> > physically two ICH bridges, or just one that is showing up two times due
> > to a firmware bug?
> I can answer that. There are two physical ICH bridges, and according to
> Intel one should be masked off. We shouldn't run with two.
Interesting. The "normal" setup I'm familiar with is multiple CPUs wired up
to one IOH, and that IOH would be wired up to the ICH10. There'd only be one
ICH10 in this configuration though. An example is on page 30 of
http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/5520-5500-chipset-ioh-datasheet.pdf I'm not sure how it'd be possible to wire up 2
ICH10s to one CPU?
How are you determining the number of ICH10s? You could try running "lspci -
v" and comparing the PCI BARs on the duplicate devices. If the duplicate PCI
devices have the same BAR values, it would indicate that there is only one
ICH10. Could you send the output of "lspci -v"?
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