[PATCHv2 4/4] Clocksource: Flextimer: Fix counter clock prescaler calculation.

[Xiubo Li]

The old code will use the uncorrect clock prescaler after the
loop and the 'ps' must minus one after the loop.

This patch will use new style of this loop and will fix this bug
at the same time.

Signed-off-by: Xiubo Li <Li.Xiubo@xxxxxxxxxxxxx>
---
 drivers/clocksource/fsl_ftm_timer.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/clocksource/fsl_ftm_timer.c b/drivers/clocksource/fsl_ftm_timer.c
index c0ce603..2b0983d 100644
--- a/drivers/clocksource/fsl_ftm_timer.c
+++ b/drivers/clocksource/fsl_ftm_timer.c
@@ -300,16 +300,15 @@ static unsigned long __init ftm_clk_init(struct device_node *np)
 
 static int __init ftm_calc_closest_round_cyc(unsigned long freq)
 {
-	priv->ps = 0;
+	int div;
 
 	/* The counter register is only using the lower 16 bits, and
 	 * if the 'freq' value is to big here, then the periodic_cyc
 	 * may exceed 0xFFFF.
 	 */
-	do {
-		priv->periodic_cyc = DIV_ROUND_CLOSEST(freq,
-						HZ * (1 << priv->ps++));
-	} while (priv->periodic_cyc > 0xFFFF);
+	for (priv->ps = 0, priv->periodic_cyc = ~0UL, div = HZ;
+	     priv->periodic_cyc > 0xffff; priv->ps++, div *= 2)
+		priv->periodic_cyc = DIV_ROUND_CLOSEST(freq, div);
 
 	if (priv->ps > FTM_PS_MAX) {
 		pr_err("ftm: the prescaler is %lu > %d\n",
-- 
2.1.0.27.g96db324

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