Re: [PATCH 1/1 v3] driver:mtd:spi-nor: Add Micron quad I/O support

From: Marek Vasut
Date: Tue Sep 30 2014 - 09:38:52 EST


On Tuesday, September 30, 2014 at 04:47:39 AM, Bean Huo éææ (beanhuo) wrote:
> For Micron spi norflash,enables or disables quad I/O
> protocol ,which controled by EVCR(Enhanced
> Volatile Configuration Register) Quad I/O
> protocol bit 7.When EVCR bit 7 is reset to 0,
> the spi norflash will operate in quad I/O following
> the next WRITE ENHANCED VOLATILE CONFIGURATION
> command.

You only do one WRITE ENHANCED VOLATILE CONFIGURATION command in the patch, so
this text doesn't add up.

Try something like this:
-->8--
This patch adds code which enables Quad I/O mode on Micron SPI NOR
flashes.

For Micron SPI NOR flash, enabling or disabling quad I/O protocol
is controled by EVCR (Enhanced Volatile Configuration Register),
Quad I/O protocol bit 7. When EVCR bit 7 is reset to 0, the SPI
NOR flash will operate in quad I/O mode.
--8<--

What do you think ?

Brian, am I bitching too much about pointless things ? Please stop me if you
think I do.

[...]

Best regards,
Marek Vasut
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/