Re: [PATCH 1/6] ARM: at91: remove at91sam9g45/9m10 legacy board support

From: Nicolas Ferre
Date: Tue Sep 30 2014 - 12:57:11 EST

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In reply to: Boris Brezillon: "[PATCH 1/6] ARM: at91: remove at91sam9g45/9m10 legacy board support"
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On 30/09/2014 18:19, Boris Brezillon :
> Remove legacy support for at91sam9g45/9m10 boards.
> This include board files removal plus all legacy code for non DT boards
> support (i.e. at91sam9g45.c and at91sam9g45_devices.c).
>
> Signed-off-by: Boris Brezillon <boris.brezillon@xxxxxxxxxxxxxxxxxx>

Glad to see this!

Acked-by: Nicolas Ferre <nicolas.ferre@xxxxxxxxx>

I'll take it soon, probably for 3.18: at91-3.18-soc

Bye,

> ---
> arch/arm/mach-at91/Kconfig.non_dt | 21 -
> arch/arm/mach-at91/Makefile | 4 -
> arch/arm/mach-at91/at91sam9g45.c | 403 -------
> arch/arm/mach-at91/at91sam9g45_devices.c | 1915 ------------------------------
> arch/arm/mach-at91/board-sam9m10g45ek.c | 526 --------
> 5 files changed, 2869 deletions(-)
> delete mode 100644 arch/arm/mach-at91/at91sam9g45_devices.c
> delete mode 100644 arch/arm/mach-at91/board-sam9m10g45ek.c
>
> diff --git a/arch/arm/mach-at91/Kconfig.non_dt b/arch/arm/mach-at91/Kconfig.non_dt
> index aa31e55..e860f7a 100644
> --- a/arch/arm/mach-at91/Kconfig.non_dt
> +++ b/arch/arm/mach-at91/Kconfig.non_dt
> @@ -35,11 +35,6 @@ config ARCH_AT91SAM9RL
> select SOC_AT91SAM9RL
> select AT91_USE_OLD_CLK
>
> -config ARCH_AT91SAM9G45
> - bool "AT91SAM9G45"
> - select SOC_AT91SAM9G45
> - select AT91_USE_OLD_CLK
> -
> endchoice
>
> config ARCH_AT91SAM9G20
> @@ -295,22 +290,6 @@ endif
>
> # ----------------------------------------------------------
>
> -if ARCH_AT91SAM9G45
> -
> -comment "AT91SAM9G45 Board Type"
> -
> -config MACH_AT91SAM9M10G45EK
> - bool "Atmel AT91SAM9M10G45-EK Evaluation Kits"
> - help
> - Select this if you are using Atmel's AT91SAM9M10G45-EK Evaluation Kit.
> - Those boards can be populated with any SoC of AT91SAM9G45 or AT91SAM9M10
> - families: AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
> - <http://www.atmel.com/tools/SAM9M10-G45-EK.aspx>
> -
> -endif
> -
> -# ----------------------------------------------------------
> -
> if ARCH_AT91X40
>
> comment "AT91X40 Board Type"
> diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
> index 3e9f01c..fe91af7 100644
> --- a/arch/arm/mach-at91/Makefile
> +++ b/arch/arm/mach-at91/Makefile
> @@ -30,7 +30,6 @@ obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260_devices.o
> obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261_devices.o
> obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263_devices.o
> obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl_devices.o
> -obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45_devices.o
> obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o
>
> # AT91RM9200 board-specific support
> @@ -77,9 +76,6 @@ obj-$(CONFIG_MACH_GSIA18S) += board-gsia18s.o board-stamp9g20.o
> # AT91SAM9260/AT91SAM9G20 board-specific support
> obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o
>
> -# AT91SAM9G45 board-specific support
> -obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o
> -
> # AT91SAM board with device-tree
> obj-$(CONFIG_MACH_AT91RM9200_DT) += board-dt-rm9200.o
> obj-$(CONFIG_MACH_AT91SAM9_DT) += board-dt-sam9.o
> diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
> index 9d45496..f658b69 100644
> --- a/arch/arm/mach-at91/at91sam9g45.c
> +++ b/arch/arm/mach-at91/at91sam9g45.c
> @@ -10,355 +10,13 @@
> *
> */
>
> -#include <linux/module.h>
> -#include <linux/dma-mapping.h>
> -#include <linux/clk/at91_pmc.h>
> -
> -#include <asm/irq.h>
> -#include <asm/mach/arch.h>
> #include <asm/mach/map.h>
> #include <asm/system_misc.h>
> -#include <mach/at91sam9g45.h>
> #include <mach/cpu.h>
> #include <mach/hardware.h>
>
> -#include "at91_aic.h"
> #include "soc.h"
> #include "generic.h"
> -#include "sam9_smc.h"
> -#include "pm.h"
> -
> -#if defined(CONFIG_OLD_CLK_AT91)
> -#include "clock.h"
> -/* --------------------------------------------------------------------
> - * Clocks
> - * -------------------------------------------------------------------- */
> -
> -/*
> - * The peripheral clocks.
> - */
> -static struct clk pioA_clk = {
> - .name = "pioA_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_PIOA,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk pioB_clk = {
> - .name = "pioB_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_PIOB,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk pioC_clk = {
> - .name = "pioC_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_PIOC,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk pioDE_clk = {
> - .name = "pioDE_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_PIODE,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk trng_clk = {
> - .name = "trng_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_TRNG,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk usart0_clk = {
> - .name = "usart0_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_US0,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk usart1_clk = {
> - .name = "usart1_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_US1,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk usart2_clk = {
> - .name = "usart2_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_US2,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk usart3_clk = {
> - .name = "usart3_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_US3,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk mmc0_clk = {
> - .name = "mci0_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_MCI0,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk twi0_clk = {
> - .name = "twi0_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_TWI0,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk twi1_clk = {
> - .name = "twi1_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_TWI1,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk spi0_clk = {
> - .name = "spi0_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_SPI0,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk spi1_clk = {
> - .name = "spi1_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_SPI1,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk ssc0_clk = {
> - .name = "ssc0_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_SSC0,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk ssc1_clk = {
> - .name = "ssc1_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_SSC1,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk tcb0_clk = {
> - .name = "tcb0_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_TCB,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk pwm_clk = {
> - .name = "pwm_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_PWMC,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk tsc_clk = {
> - .name = "tsc_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_TSC,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk dma_clk = {
> - .name = "dma_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_DMA,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk uhphs_clk = {
> - .name = "uhphs_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_UHPHS,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk lcdc_clk = {
> - .name = "lcdc_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_LCDC,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk ac97_clk = {
> - .name = "ac97_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_AC97C,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk macb_clk = {
> - .name = "pclk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_EMAC,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk isi_clk = {
> - .name = "isi_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_ISI,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk udphs_clk = {
> - .name = "udphs_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_UDPHS,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -static struct clk mmc1_clk = {
> - .name = "mci1_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_MCI1,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -
> -/* Video decoder clock - Only for sam9m10/sam9m11 */
> -static struct clk vdec_clk = {
> - .name = "vdec_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_VDEC,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -
> -static struct clk adc_op_clk = {
> - .name = "adc_op_clk",
> - .type = CLK_TYPE_PERIPHERAL,
> - .rate_hz = 300000,
> -};
> -
> -/* AES/TDES/SHA clock - Only for sam9m11/sam9g56 */
> -static struct clk aestdessha_clk = {
> - .name = "aestdessha_clk",
> - .pmc_mask = 1 << AT91SAM9G45_ID_AESTDESSHA,
> - .type = CLK_TYPE_PERIPHERAL,
> -};
> -
> -static struct clk *periph_clocks[] __initdata = {
> - &pioA_clk,
> - &pioB_clk,
> - &pioC_clk,
> - &pioDE_clk,
> - &trng_clk,
> - &usart0_clk,
> - &usart1_clk,
> - &usart2_clk,
> - &usart3_clk,
> - &mmc0_clk,
> - &twi0_clk,
> - &twi1_clk,
> - &spi0_clk,
> - &spi1_clk,
> - &ssc0_clk,
> - &ssc1_clk,
> - &tcb0_clk,
> - &pwm_clk,
> - &tsc_clk,
> - &dma_clk,
> - &uhphs_clk,
> - &lcdc_clk,
> - &ac97_clk,
> - &macb_clk,
> - &isi_clk,
> - &udphs_clk,
> - &mmc1_clk,
> - &adc_op_clk,
> - &aestdessha_clk,
> - // irq0
> -};
> -
> -static struct clk_lookup periph_clocks_lookups[] = {
> - /* One additional fake clock for macb_hclk */
> - CLKDEV_CON_ID("hclk", &macb_clk),
> - /* One additional fake clock for ohci */
> - CLKDEV_CON_ID("ohci_clk", &uhphs_clk),
> - CLKDEV_CON_DEV_ID("hclk", "at91sam9g45-lcdfb.0", &lcdc_clk),
> - CLKDEV_CON_DEV_ID("hclk", "at91sam9g45es-lcdfb.0", &lcdc_clk),
> - CLKDEV_CON_DEV_ID("ehci_clk", "atmel-ehci", &uhphs_clk),
> - CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk),
> - CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk),
> - CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.0", &mmc0_clk),
> - CLKDEV_CON_DEV_ID("mci_clk", "atmel_mci.1", &mmc1_clk),
> - CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
> - CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
> - CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb0_clk),
> - CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tcb0_clk),
> - CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10.0", &twi0_clk),
> - CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10.1", &twi1_clk),
> - CLKDEV_CON_DEV_ID("pclk", "at91sam9g45_ssc.0", &ssc0_clk),
> - CLKDEV_CON_DEV_ID("pclk", "at91sam9g45_ssc.1", &ssc1_clk),
> - CLKDEV_CON_DEV_ID("pclk", "fff9c000.ssc", &ssc0_clk),
> - CLKDEV_CON_DEV_ID("pclk", "fffa0000.ssc", &ssc1_clk),
> - CLKDEV_CON_DEV_ID(NULL, "atmel-trng", &trng_clk),
> - CLKDEV_CON_DEV_ID(NULL, "atmel_sha", &aestdessha_clk),
> - CLKDEV_CON_DEV_ID(NULL, "atmel_tdes", &aestdessha_clk),
> - CLKDEV_CON_DEV_ID(NULL, "atmel_aes", &aestdessha_clk),
> - CLKDEV_CON_DEV_ID(NULL, "at91sam9rl-pwm", &pwm_clk),
> - /* more usart lookup table for DT entries */
> - CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck),
> - CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &usart0_clk),
> - CLKDEV_CON_DEV_ID("usart", "fff90000.serial", &usart1_clk),
> - CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
> - CLKDEV_CON_DEV_ID("usart", "fff98000.serial", &usart3_clk),
> - /* more tc lookup table for DT entries */
> - CLKDEV_CON_DEV_ID("t0_clk", "fff7c000.timer", &tcb0_clk),
> - CLKDEV_CON_DEV_ID("t0_clk", "fffd4000.timer", &tcb0_clk),
> - CLKDEV_CON_DEV_ID("hclk", "700000.ohci", &uhphs_clk),
> - CLKDEV_CON_DEV_ID("ehci_clk", "800000.ehci", &uhphs_clk),
> - CLKDEV_CON_DEV_ID("mci_clk", "fff80000.mmc", &mmc0_clk),
> - CLKDEV_CON_DEV_ID("mci_clk", "fffd0000.mmc", &mmc1_clk),
> - CLKDEV_CON_DEV_ID(NULL, "fff84000.i2c", &twi0_clk),
> - CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk),
> - CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
> - CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
> - CLKDEV_CON_DEV_ID("hclk", "600000.gadget", &utmi_clk),
> - CLKDEV_CON_DEV_ID("pclk", "600000.gadget", &udphs_clk),
> - /* fake hclk clock */
> - CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
> - CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
> - CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
> - CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioC_clk),
> - CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioDE_clk),
> - CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioDE_clk),
> -
> - CLKDEV_CON_ID("pioA", &pioA_clk),
> - CLKDEV_CON_ID("pioB", &pioB_clk),
> - CLKDEV_CON_ID("pioC", &pioC_clk),
> - CLKDEV_CON_ID("pioD", &pioDE_clk),
> - CLKDEV_CON_ID("pioE", &pioDE_clk),
> - /* Fake adc clock */
> - CLKDEV_CON_ID("adc_clk", &tsc_clk),
> - CLKDEV_CON_DEV_ID(NULL, "fffb8000.pwm", &pwm_clk),
> -};
> -
> -static struct clk_lookup usart_clocks_lookups[] = {
> - CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
> - CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
> - CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
> - CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
> - CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk),
> -};
> -
> -/*
> - * The two programmable clocks.
> - * You must configure pin multiplexing to bring these signals out.
> - */
> -static struct clk pck0 = {
> - .name = "pck0",
> - .pmc_mask = AT91_PMC_PCK0,
> - .type = CLK_TYPE_PROGRAMMABLE,
> - .id = 0,
> -};
> -static struct clk pck1 = {
> - .name = "pck1",
> - .pmc_mask = AT91_PMC_PCK1,
> - .type = CLK_TYPE_PROGRAMMABLE,
> - .id = 1,
> -};
> -
> -static void __init at91sam9g45_register_clocks(void)
> -{
> - int i;
> -
> - for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
> - clk_register(periph_clocks[i]);
> -
> - clkdev_add_table(periph_clocks_lookups,
> - ARRAY_SIZE(periph_clocks_lookups));
> - clkdev_add_table(usart_clocks_lookups,
> - ARRAY_SIZE(usart_clocks_lookups));
> -
> - if (cpu_is_at91sam9m10() || cpu_is_at91sam9m11())
> - clk_register(&vdec_clk);
> -
> - clk_register(&pck0);
> - clk_register(&pck1);
> -}
> -#else
> -#define at91sam9g45_register_clocks NULL
> -#endif
> -
> -/* --------------------------------------------------------------------
> - * GPIO
> - * -------------------------------------------------------------------- */
> -
> -static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
> - {
> - .id = AT91SAM9G45_ID_PIOA,
> - .regbase = AT91SAM9G45_BASE_PIOA,
> - }, {
> - .id = AT91SAM9G45_ID_PIOB,
> - .regbase = AT91SAM9G45_BASE_PIOB,
> - }, {
> - .id = AT91SAM9G45_ID_PIOC,
> - .regbase = AT91SAM9G45_BASE_PIOC,
> - }, {
> - .id = AT91SAM9G45_ID_PIODE,
> - .regbase = AT91SAM9G45_BASE_PIOD,
> - }, {
> - .id = AT91SAM9G45_ID_PIODE,
> - .regbase = AT91SAM9G45_BASE_PIOE,
> - }
> -};
>
> /* --------------------------------------------------------------------
> * AT91SAM9G45 processor initialization
> @@ -369,18 +27,6 @@ static void __init at91sam9g45_map_io(void)
> at91_init_sram(0, AT91SAM9G45_SRAM_BASE, AT91SAM9G45_SRAM_SIZE);
> }
>
> -static void __init at91sam9g45_ioremap_registers(void)
> -{
> - at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC);
> - at91_ioremap_rstc(AT91SAM9G45_BASE_RSTC);
> - at91_ioremap_ramc(0, AT91SAM9G45_BASE_DDRSDRC1, 512);
> - at91_ioremap_ramc(1, AT91SAM9G45_BASE_DDRSDRC0, 512);
> - at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT);
> - at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC);
> - at91_ioremap_matrix(AT91SAM9G45_BASE_MATRIX);
> - at91_pm_set_standby(at91_ddr_standby);
> -}
> -
> static void __init at91sam9g45_initialize(void)
> {
> arm_pm_idle = at91sam9_idle;
> @@ -388,58 +34,9 @@ static void __init at91sam9g45_initialize(void)
>
> at91_sysirq_mask_rtc(AT91SAM9G45_BASE_RTC);
> at91_sysirq_mask_rtt(AT91SAM9G45_BASE_RTT);
> -
> - /* Register GPIO subsystem */
> - at91_gpio_init(at91sam9g45_gpio, 5);
> }
>
> -/* --------------------------------------------------------------------
> - * Interrupt initialization
> - * -------------------------------------------------------------------- */
> -
> -/*
> - * The default interrupt priority levels (0 = lowest, 7 = highest).
> - */
> -static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = {
> - 7, /* Advanced Interrupt Controller (FIQ) */
> - 7, /* System Peripherals */
> - 1, /* Parallel IO Controller A */
> - 1, /* Parallel IO Controller B */
> - 1, /* Parallel IO Controller C */
> - 1, /* Parallel IO Controller D and E */
> - 0,
> - 5, /* USART 0 */
> - 5, /* USART 1 */
> - 5, /* USART 2 */
> - 5, /* USART 3 */
> - 0, /* Multimedia Card Interface 0 */
> - 6, /* Two-Wire Interface 0 */
> - 6, /* Two-Wire Interface 1 */
> - 5, /* Serial Peripheral Interface 0 */
> - 5, /* Serial Peripheral Interface 1 */
> - 4, /* Serial Synchronous Controller 0 */
> - 4, /* Serial Synchronous Controller 1 */
> - 0, /* Timer Counter 0, 1, 2, 3, 4 and 5 */
> - 0, /* Pulse Width Modulation Controller */
> - 0, /* Touch Screen Controller */
> - 0, /* DMA Controller */
> - 2, /* USB Host High Speed port */
> - 3, /* LDC Controller */
> - 5, /* AC97 Controller */
> - 3, /* Ethernet */
> - 0, /* Image Sensor Interface */
> - 2, /* USB Device High speed port */
> - 0, /* AESTDESSHA Crypto HW Accelerators */
> - 0, /* Multimedia Card Interface 1 */
> - 0,
> - 0, /* Advanced Interrupt Controller (IRQ0) */
> -};
> -
> AT91_SOC_START(at91sam9g45)
> .map_io = at91sam9g45_map_io,
> - .default_irq_priority = at91sam9g45_default_irq_priority,
> - .extern_irq = (1 << AT91SAM9G45_ID_IRQ0),
> - .ioremap_registers = at91sam9g45_ioremap_registers,
> - .register_clocks = at91sam9g45_register_clocks,
> .init = at91sam9g45_initialize,
> AT91_SOC_END
> diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
> deleted file mode 100644
> index 21ab782..0000000
> --- a/arch/arm/mach-at91/at91sam9g45_devices.c
> +++ /dev/null
> @@ -1,1915 +0,0 @@
> -/*
> - * On-Chip devices setup code for the AT91SAM9G45 family
> - *
> - * Copyright (C) 2009 Atmel Corporation.
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License as published by
> - * the Free Software Foundation; either version 2 of the License, or
> - * (at your option) any later version.
> - *
> - */
> -#include <asm/mach/arch.h>
> -#include <asm/mach/map.h>
> -
> -#include <linux/dma-mapping.h>
> -#include <linux/gpio.h>
> -#include <linux/clk.h>
> -#include <linux/platform_device.h>
> -#include <linux/i2c-gpio.h>
> -#include <linux/atmel-mci.h>
> -#include <linux/platform_data/crypto-atmel.h>
> -
> -#include <linux/platform_data/at91_adc.h>
> -
> -#include <linux/fb.h>
> -#include <video/atmel_lcdc.h>
> -
> -#include <mach/at91sam9g45.h>
> -#include <mach/at91sam9g45_matrix.h>
> -#include <mach/at91_matrix.h>
> -#include <mach/at91sam9_smc.h>
> -#include <linux/platform_data/dma-atmel.h>
> -#include <mach/atmel-mci.h>
> -#include <mach/hardware.h>
> -
> -#include <media/atmel-isi.h>
> -
> -#include "board.h"
> -#include "generic.h"
> -#include "clock.h"
> -#include "gpio.h"
> -
> -
> -/* --------------------------------------------------------------------
> - * HDMAC - AHB DMA Controller
> - * -------------------------------------------------------------------- */
> -
> -#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
> -static u64 hdmac_dmamask = DMA_BIT_MASK(32);
> -
> -static struct resource hdmac_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_DMA,
> - .end = AT91SAM9G45_BASE_DMA + SZ_512 - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at_hdmac_device = {
> - .name = "at91sam9g45_dma",
> - .id = -1,
> - .dev = {
> - .dma_mask = &hdmac_dmamask,
> - .coherent_dma_mask = DMA_BIT_MASK(32),
> - },
> - .resource = hdmac_resources,
> - .num_resources = ARRAY_SIZE(hdmac_resources),
> -};
> -
> -void __init at91_add_device_hdmac(void)
> -{
> - platform_device_register(&at_hdmac_device);
> -}
> -#else
> -void __init at91_add_device_hdmac(void) {}
> -#endif
> -
> -
> -/* --------------------------------------------------------------------
> - * USB Host (OHCI)
> - * -------------------------------------------------------------------- */
> -
> -#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
> -static u64 ohci_dmamask = DMA_BIT_MASK(32);
> -static struct at91_usbh_data usbh_ohci_data;
> -
> -static struct resource usbh_ohci_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_OHCI_BASE,
> - .end = AT91SAM9G45_OHCI_BASE + SZ_1M - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at91_usbh_ohci_device = {
> - .name = "at91_ohci",
> - .id = -1,
> - .dev = {
> - .dma_mask = &ohci_dmamask,
> - .coherent_dma_mask = DMA_BIT_MASK(32),
> - .platform_data = &usbh_ohci_data,
> - },
> - .resource = usbh_ohci_resources,
> - .num_resources = ARRAY_SIZE(usbh_ohci_resources),
> -};
> -
> -void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data)
> -{
> - int i;
> -
> - if (!data)
> - return;
> -
> - /* Enable VBus control for UHP ports */
> - for (i = 0; i < data->ports; i++) {
> - if (gpio_is_valid(data->vbus_pin[i]))
> - at91_set_gpio_output(data->vbus_pin[i],
> - data->vbus_pin_active_low[i]);
> - }
> -
> - /* Enable overcurrent notification */
> - for (i = 0; i < data->ports; i++) {
> - if (gpio_is_valid(data->overcurrent_pin[i]))
> - at91_set_gpio_input(data->overcurrent_pin[i], 1);
> - }
> -
> - usbh_ohci_data = *data;
> - platform_device_register(&at91_usbh_ohci_device);
> -}
> -#else
> -void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) {}
> -#endif
> -
> -
> -/* --------------------------------------------------------------------
> - * USB Host HS (EHCI)
> - * Needs an OHCI host for low and full speed management
> - * -------------------------------------------------------------------- */
> -
> -#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE)
> -static u64 ehci_dmamask = DMA_BIT_MASK(32);
> -static struct at91_usbh_data usbh_ehci_data;
> -
> -static struct resource usbh_ehci_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_EHCI_BASE,
> - .end = AT91SAM9G45_EHCI_BASE + SZ_1M - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at91_usbh_ehci_device = {
> - .name = "atmel-ehci",
> - .id = -1,
> - .dev = {
> - .dma_mask = &ehci_dmamask,
> - .coherent_dma_mask = DMA_BIT_MASK(32),
> - .platform_data = &usbh_ehci_data,
> - },
> - .resource = usbh_ehci_resources,
> - .num_resources = ARRAY_SIZE(usbh_ehci_resources),
> -};
> -
> -void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data)
> -{
> - int i;
> -
> - if (!data)
> - return;
> -
> - /* Enable VBus control for UHP ports */
> - for (i = 0; i < data->ports; i++) {
> - if (gpio_is_valid(data->vbus_pin[i]))
> - at91_set_gpio_output(data->vbus_pin[i],
> - data->vbus_pin_active_low[i]);
> - }
> -
> - usbh_ehci_data = *data;
> - platform_device_register(&at91_usbh_ehci_device);
> -}
> -#else
> -void __init at91_add_device_usbh_ehci(struct at91_usbh_data *data) {}
> -#endif
> -
> -
> -/* --------------------------------------------------------------------
> - * USB HS Device (Gadget)
> - * -------------------------------------------------------------------- */
> -
> -#if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE)
> -static struct resource usba_udc_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_UDPHS_FIFO,
> - .end = AT91SAM9G45_UDPHS_FIFO + SZ_512K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = AT91SAM9G45_BASE_UDPHS,
> - .end = AT91SAM9G45_BASE_UDPHS + SZ_1K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [2] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
> - [idx] = { \
> - .name = nam, \
> - .index = idx, \
> - .fifo_size = maxpkt, \
> - .nr_banks = maxbk, \
> - .can_dma = dma, \
> - .can_isoc = isoc, \
> - }
> -
> -static struct usba_ep_data usba_udc_ep[] __initdata = {
> - EP("ep0", 0, 64, 1, 0, 0),
> - EP("ep1", 1, 1024, 2, 1, 1),
> - EP("ep2", 2, 1024, 2, 1, 1),
> - EP("ep3", 3, 1024, 3, 1, 0),
> - EP("ep4", 4, 1024, 3, 1, 0),
> - EP("ep5", 5, 1024, 3, 1, 1),
> - EP("ep6", 6, 1024, 3, 1, 1),
> -};
> -
> -#undef EP
> -
> -/*
> - * pdata doesn't have room for any endpoints, so we need to
> - * append room for the ones we need right after it.
> - */
> -static struct {
> - struct usba_platform_data pdata;
> - struct usba_ep_data ep[7];
> -} usba_udc_data;
> -
> -static struct platform_device at91_usba_udc_device = {
> - .name = "atmel_usba_udc",
> - .id = -1,
> - .dev = {
> - .platform_data = &usba_udc_data.pdata,
> - },
> - .resource = usba_udc_resources,
> - .num_resources = ARRAY_SIZE(usba_udc_resources),
> -};
> -
> -void __init at91_add_device_usba(struct usba_platform_data *data)
> -{
> - usba_udc_data.pdata.vbus_pin = -EINVAL;
> - usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
> - memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
> -
> - if (data && gpio_is_valid(data->vbus_pin)) {
> - at91_set_gpio_input(data->vbus_pin, 0);
> - at91_set_deglitch(data->vbus_pin, 1);
> - usba_udc_data.pdata.vbus_pin = data->vbus_pin;
> - }
> -
> - /* Pullup pin is handled internally by USB device peripheral */
> -
> - platform_device_register(&at91_usba_udc_device);
> -}
> -#else
> -void __init at91_add_device_usba(struct usba_platform_data *data) {}
> -#endif
> -
> -
> -/* --------------------------------------------------------------------
> - * Ethernet
> - * -------------------------------------------------------------------- */
> -
> -#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
> -static u64 eth_dmamask = DMA_BIT_MASK(32);
> -static struct macb_platform_data eth_data;
> -
> -static struct resource eth_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_EMAC,
> - .end = AT91SAM9G45_BASE_EMAC + SZ_16K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at91sam9g45_eth_device = {
> - .name = "macb",
> - .id = -1,
> - .dev = {
> - .dma_mask = &eth_dmamask,
> - .coherent_dma_mask = DMA_BIT_MASK(32),
> - .platform_data = &eth_data,
> - },
> - .resource = eth_resources,
> - .num_resources = ARRAY_SIZE(eth_resources),
> -};
> -
> -void __init at91_add_device_eth(struct macb_platform_data *data)
> -{
> - if (!data)
> - return;
> -
> - if (gpio_is_valid(data->phy_irq_pin)) {
> - at91_set_gpio_input(data->phy_irq_pin, 0);
> - at91_set_deglitch(data->phy_irq_pin, 1);
> - }
> -
> - /* Pins used for MII and RMII */
> - at91_set_A_periph(AT91_PIN_PA17, 0); /* ETXCK_EREFCK */
> - at91_set_A_periph(AT91_PIN_PA15, 0); /* ERXDV */
> - at91_set_A_periph(AT91_PIN_PA12, 0); /* ERX0 */
> - at91_set_A_periph(AT91_PIN_PA13, 0); /* ERX1 */
> - at91_set_A_periph(AT91_PIN_PA16, 0); /* ERXER */
> - at91_set_A_periph(AT91_PIN_PA14, 0); /* ETXEN */
> - at91_set_A_periph(AT91_PIN_PA10, 0); /* ETX0 */
> - at91_set_A_periph(AT91_PIN_PA11, 0); /* ETX1 */
> - at91_set_A_periph(AT91_PIN_PA19, 0); /* EMDIO */
> - at91_set_A_periph(AT91_PIN_PA18, 0); /* EMDC */
> -
> - if (!data->is_rmii) {
> - at91_set_B_periph(AT91_PIN_PA29, 0); /* ECRS */
> - at91_set_B_periph(AT91_PIN_PA30, 0); /* ECOL */
> - at91_set_B_periph(AT91_PIN_PA8, 0); /* ERX2 */
> - at91_set_B_periph(AT91_PIN_PA9, 0); /* ERX3 */
> - at91_set_B_periph(AT91_PIN_PA28, 0); /* ERXCK */
> - at91_set_B_periph(AT91_PIN_PA6, 0); /* ETX2 */
> - at91_set_B_periph(AT91_PIN_PA7, 0); /* ETX3 */
> - at91_set_B_periph(AT91_PIN_PA27, 0); /* ETXER */
> - }
> -
> - eth_data = *data;
> - platform_device_register(&at91sam9g45_eth_device);
> -}
> -#else
> -void __init at91_add_device_eth(struct macb_platform_data *data) {}
> -#endif
> -
> -
> -/* --------------------------------------------------------------------
> - * MMC / SD
> - * -------------------------------------------------------------------- */
> -
> -#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
> -static u64 mmc_dmamask = DMA_BIT_MASK(32);
> -static struct mci_platform_data mmc0_data, mmc1_data;
> -
> -static struct resource mmc0_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_MCI0,
> - .end = AT91SAM9G45_BASE_MCI0 + SZ_16K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at91sam9g45_mmc0_device = {
> - .name = "atmel_mci",
> - .id = 0,
> - .dev = {
> - .dma_mask = &mmc_dmamask,
> - .coherent_dma_mask = DMA_BIT_MASK(32),
> - .platform_data = &mmc0_data,
> - },
> - .resource = mmc0_resources,
> - .num_resources = ARRAY_SIZE(mmc0_resources),
> -};
> -
> -static struct resource mmc1_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_MCI1,
> - .end = AT91SAM9G45_BASE_MCI1 + SZ_16K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at91sam9g45_mmc1_device = {
> - .name = "atmel_mci",
> - .id = 1,
> - .dev = {
> - .dma_mask = &mmc_dmamask,
> - .coherent_dma_mask = DMA_BIT_MASK(32),
> - .platform_data = &mmc1_data,
> - },
> - .resource = mmc1_resources,
> - .num_resources = ARRAY_SIZE(mmc1_resources),
> -};
> -
> -/* Consider only one slot : slot 0 */
> -void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
> -{
> -
> - if (!data)
> - return;
> -
> - /* Must have at least one usable slot */
> - if (!data->slot[0].bus_width)
> - return;
> -
> -#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
> - {
> - struct at_dma_slave *atslave;
> - struct mci_dma_data *alt_atslave;
> -
> - alt_atslave = kzalloc(sizeof(struct mci_dma_data), GFP_KERNEL);
> - atslave = &alt_atslave->sdata;
> -
> - /* DMA slave channel configuration */
> - atslave->dma_dev = &at_hdmac_device.dev;
> - atslave->cfg = ATC_FIFOCFG_HALFFIFO
> - | ATC_SRC_H2SEL_HW | ATC_DST_H2SEL_HW;
> - if (mmc_id == 0) /* MCI0 */
> - atslave->cfg |= ATC_SRC_PER(AT_DMA_ID_MCI0)
> - | ATC_DST_PER(AT_DMA_ID_MCI0);
> -
> - else /* MCI1 */
> - atslave->cfg |= ATC_SRC_PER(AT_DMA_ID_MCI1)
> - | ATC_DST_PER(AT_DMA_ID_MCI1);
> -
> - data->dma_slave = alt_atslave;
> - }
> -#endif
> -
> -
> - /* input/irq */
> - if (gpio_is_valid(data->slot[0].detect_pin)) {
> - at91_set_gpio_input(data->slot[0].detect_pin, 1);
> - at91_set_deglitch(data->slot[0].detect_pin, 1);
> - }
> - if (gpio_is_valid(data->slot[0].wp_pin))
> - at91_set_gpio_input(data->slot[0].wp_pin, 1);
> -
> - if (mmc_id == 0) { /* MCI0 */
> -
> - /* CLK */
> - at91_set_A_periph(AT91_PIN_PA0, 0);
> -
> - /* CMD */
> - at91_set_A_periph(AT91_PIN_PA1, 1);
> -
> - /* DAT0, maybe DAT1..DAT3 and maybe DAT4..DAT7 */
> - at91_set_A_periph(AT91_PIN_PA2, 1);
> - if (data->slot[0].bus_width == 4) {
> - at91_set_A_periph(AT91_PIN_PA3, 1);
> - at91_set_A_periph(AT91_PIN_PA4, 1);
> - at91_set_A_periph(AT91_PIN_PA5, 1);
> - if (data->slot[0].bus_width == 8) {
> - at91_set_A_periph(AT91_PIN_PA6, 1);
> - at91_set_A_periph(AT91_PIN_PA7, 1);
> - at91_set_A_periph(AT91_PIN_PA8, 1);
> - at91_set_A_periph(AT91_PIN_PA9, 1);
> - }
> - }
> -
> - mmc0_data = *data;
> - platform_device_register(&at91sam9g45_mmc0_device);
> -
> - } else { /* MCI1 */
> -
> - /* CLK */
> - at91_set_A_periph(AT91_PIN_PA31, 0);
> -
> - /* CMD */
> - at91_set_A_periph(AT91_PIN_PA22, 1);
> -
> - /* DAT0, maybe DAT1..DAT3 and maybe DAT4..DAT7 */
> - at91_set_A_periph(AT91_PIN_PA23, 1);
> - if (data->slot[0].bus_width == 4) {
> - at91_set_A_periph(AT91_PIN_PA24, 1);
> - at91_set_A_periph(AT91_PIN_PA25, 1);
> - at91_set_A_periph(AT91_PIN_PA26, 1);
> - if (data->slot[0].bus_width == 8) {
> - at91_set_A_periph(AT91_PIN_PA27, 1);
> - at91_set_A_periph(AT91_PIN_PA28, 1);
> - at91_set_A_periph(AT91_PIN_PA29, 1);
> - at91_set_A_periph(AT91_PIN_PA30, 1);
> - }
> - }
> -
> - mmc1_data = *data;
> - platform_device_register(&at91sam9g45_mmc1_device);
> -
> - }
> -}
> -#else
> -void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
> -#endif
> -
> -
> -/* --------------------------------------------------------------------
> - * NAND / SmartMedia
> - * -------------------------------------------------------------------- */
> -
> -#if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
> -static struct atmel_nand_data nand_data;
> -
> -#define NAND_BASE AT91_CHIPSELECT_3
> -
> -static struct resource nand_resources[] = {
> - [0] = {
> - .start = NAND_BASE,
> - .end = NAND_BASE + SZ_256M - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = AT91SAM9G45_BASE_ECC,
> - .end = AT91SAM9G45_BASE_ECC + SZ_512 - 1,
> - .flags = IORESOURCE_MEM,
> - }
> -};
> -
> -static struct platform_device at91sam9g45_nand_device = {
> - .name = "atmel_nand",
> - .id = -1,
> - .dev = {
> - .platform_data = &nand_data,
> - },
> - .resource = nand_resources,
> - .num_resources = ARRAY_SIZE(nand_resources),
> -};
> -
> -void __init at91_add_device_nand(struct atmel_nand_data *data)
> -{
> - unsigned long csa;
> -
> - if (!data)
> - return;
> -
> - csa = at91_matrix_read(AT91_MATRIX_EBICSA);
> - at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
> -
> - /* enable pin */
> - if (gpio_is_valid(data->enable_pin))
> - at91_set_gpio_output(data->enable_pin, 1);
> -
> - /* ready/busy pin */
> - if (gpio_is_valid(data->rdy_pin))
> - at91_set_gpio_input(data->rdy_pin, 1);
> -
> - /* card detect pin */
> - if (gpio_is_valid(data->det_pin))
> - at91_set_gpio_input(data->det_pin, 1);
> -
> - nand_data = *data;
> - platform_device_register(&at91sam9g45_nand_device);
> -}
> -#else
> -void __init at91_add_device_nand(struct atmel_nand_data *data) {}
> -#endif
> -
> -
> -/* --------------------------------------------------------------------
> - * TWI (i2c)
> - * -------------------------------------------------------------------- */
> -
> -/*
> - * Prefer the GPIO code since the TWI controller isn't robust
> - * (gets overruns and underruns under load) and can only issue
> - * repeated STARTs in one scenario (the driver doesn't yet handle them).
> - */
> -#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
> -static struct i2c_gpio_platform_data pdata_i2c0 = {
> - .sda_pin = AT91_PIN_PA20,
> - .sda_is_open_drain = 1,
> - .scl_pin = AT91_PIN_PA21,
> - .scl_is_open_drain = 1,
> - .udelay = 5, /* ~100 kHz */
> -};
> -
> -static struct platform_device at91sam9g45_twi0_device = {
> - .name = "i2c-gpio",
> - .id = 0,
> - .dev.platform_data = &pdata_i2c0,
> -};
> -
> -static struct i2c_gpio_platform_data pdata_i2c1 = {
> - .sda_pin = AT91_PIN_PB10,
> - .sda_is_open_drain = 1,
> - .scl_pin = AT91_PIN_PB11,
> - .scl_is_open_drain = 1,
> - .udelay = 5, /* ~100 kHz */
> -};
> -
> -static struct platform_device at91sam9g45_twi1_device = {
> - .name = "i2c-gpio",
> - .id = 1,
> - .dev.platform_data = &pdata_i2c1,
> -};
> -
> -void __init at91_add_device_i2c(short i2c_id, struct i2c_board_info *devices, int nr_devices)
> -{
> - i2c_register_board_info(i2c_id, devices, nr_devices);
> -
> - if (i2c_id == 0) {
> - at91_set_GPIO_periph(AT91_PIN_PA20, 1); /* TWD (SDA) */
> - at91_set_multi_drive(AT91_PIN_PA20, 1);
> -
> - at91_set_GPIO_periph(AT91_PIN_PA21, 1); /* TWCK (SCL) */
> - at91_set_multi_drive(AT91_PIN_PA21, 1);
> -
> - platform_device_register(&at91sam9g45_twi0_device);
> - } else {
> - at91_set_GPIO_periph(AT91_PIN_PB10, 1); /* TWD (SDA) */
> - at91_set_multi_drive(AT91_PIN_PB10, 1);
> -
> - at91_set_GPIO_periph(AT91_PIN_PB11, 1); /* TWCK (SCL) */
> - at91_set_multi_drive(AT91_PIN_PB11, 1);
> -
> - platform_device_register(&at91sam9g45_twi1_device);
> - }
> -}
> -
> -#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
> -static struct resource twi0_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_TWI0,
> - .end = AT91SAM9G45_BASE_TWI0 + SZ_16K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at91sam9g45_twi0_device = {
> - .name = "i2c-at91sam9g10",
> - .id = 0,
> - .resource = twi0_resources,
> - .num_resources = ARRAY_SIZE(twi0_resources),
> -};
> -
> -static struct resource twi1_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_TWI1,
> - .end = AT91SAM9G45_BASE_TWI1 + SZ_16K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at91sam9g45_twi1_device = {
> - .name = "i2c-at91sam9g10",
> - .id = 1,
> - .resource = twi1_resources,
> - .num_resources = ARRAY_SIZE(twi1_resources),
> -};
> -
> -void __init at91_add_device_i2c(short i2c_id, struct i2c_board_info *devices, int nr_devices)
> -{
> - i2c_register_board_info(i2c_id, devices, nr_devices);
> -
> - /* pins used for TWI interface */
> - if (i2c_id == 0) {
> - at91_set_A_periph(AT91_PIN_PA20, 0); /* TWD */
> - at91_set_A_periph(AT91_PIN_PA21, 0); /* TWCK */
> -
> - platform_device_register(&at91sam9g45_twi0_device);
> - } else {
> - at91_set_A_periph(AT91_PIN_PB10, 0); /* TWD */
> - at91_set_A_periph(AT91_PIN_PB11, 0); /* TWCK */
> -
> - platform_device_register(&at91sam9g45_twi1_device);
> - }
> -}
> -#else
> -void __init at91_add_device_i2c(short i2c_id, struct i2c_board_info *devices, int nr_devices) {}
> -#endif
> -
> -
> -/* --------------------------------------------------------------------
> - * SPI
> - * -------------------------------------------------------------------- */
> -
> -#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
> -static u64 spi_dmamask = DMA_BIT_MASK(32);
> -
> -static struct resource spi0_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_SPI0,
> - .end = AT91SAM9G45_BASE_SPI0 + SZ_16K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at91sam9g45_spi0_device = {
> - .name = "atmel_spi",
> - .id = 0,
> - .dev = {
> - .dma_mask = &spi_dmamask,
> - .coherent_dma_mask = DMA_BIT_MASK(32),
> - },
> - .resource = spi0_resources,
> - .num_resources = ARRAY_SIZE(spi0_resources),
> -};
> -
> -static const unsigned spi0_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PB18, AT91_PIN_PB19, AT91_PIN_PD27 };
> -
> -static struct resource spi1_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_SPI1,
> - .end = AT91SAM9G45_BASE_SPI1 + SZ_16K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at91sam9g45_spi1_device = {
> - .name = "atmel_spi",
> - .id = 1,
> - .dev = {
> - .dma_mask = &spi_dmamask,
> - .coherent_dma_mask = DMA_BIT_MASK(32),
> - },
> - .resource = spi1_resources,
> - .num_resources = ARRAY_SIZE(spi1_resources),
> -};
> -
> -static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB17, AT91_PIN_PD28, AT91_PIN_PD18, AT91_PIN_PD19 };
> -
> -void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
> -{
> - int i;
> - unsigned long cs_pin;
> - short enable_spi0 = 0;
> - short enable_spi1 = 0;
> -
> - /* Choose SPI chip-selects */
> - for (i = 0; i < nr_devices; i++) {
> - if (devices[i].controller_data)
> - cs_pin = (unsigned long) devices[i].controller_data;
> - else if (devices[i].bus_num == 0)
> - cs_pin = spi0_standard_cs[devices[i].chip_select];
> - else
> - cs_pin = spi1_standard_cs[devices[i].chip_select];
> -
> - if (!gpio_is_valid(cs_pin))
> - continue;
> -
> - if (devices[i].bus_num == 0)
> - enable_spi0 = 1;
> - else
> - enable_spi1 = 1;
> -
> - /* enable chip-select pin */
> - at91_set_gpio_output(cs_pin, 1);
> -
> - /* pass chip-select pin to driver */
> - devices[i].controller_data = (void *) cs_pin;
> - }
> -
> - spi_register_board_info(devices, nr_devices);
> -
> - /* Configure SPI bus(es) */
> - if (enable_spi0) {
> - at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI0_MISO */
> - at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI0_MOSI */
> - at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI0_SPCK */
> -
> - platform_device_register(&at91sam9g45_spi0_device);
> - }
> - if (enable_spi1) {
> - at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_MISO */
> - at91_set_A_periph(AT91_PIN_PB15, 0); /* SPI1_MOSI */
> - at91_set_A_periph(AT91_PIN_PB16, 0); /* SPI1_SPCK */
> -
> - platform_device_register(&at91sam9g45_spi1_device);
> - }
> -}
> -#else
> -void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
> -#endif
> -
> -
> -/* --------------------------------------------------------------------
> - * AC97
> - * -------------------------------------------------------------------- */
> -
> -#if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
> -static u64 ac97_dmamask = DMA_BIT_MASK(32);
> -static struct ac97c_platform_data ac97_data;
> -
> -static struct resource ac97_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_AC97C,
> - .end = AT91SAM9G45_BASE_AC97C + SZ_16K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at91sam9g45_ac97_device = {
> - .name = "atmel_ac97c",
> - .id = 0,
> - .dev = {
> - .dma_mask = &ac97_dmamask,
> - .coherent_dma_mask = DMA_BIT_MASK(32),
> - .platform_data = &ac97_data,
> - },
> - .resource = ac97_resources,
> - .num_resources = ARRAY_SIZE(ac97_resources),
> -};
> -
> -void __init at91_add_device_ac97(struct ac97c_platform_data *data)
> -{
> - if (!data)
> - return;
> -
> - at91_set_A_periph(AT91_PIN_PD8, 0); /* AC97FS */
> - at91_set_A_periph(AT91_PIN_PD9, 0); /* AC97CK */
> - at91_set_A_periph(AT91_PIN_PD7, 0); /* AC97TX */
> - at91_set_A_periph(AT91_PIN_PD6, 0); /* AC97RX */
> -
> - /* reset */
> - if (gpio_is_valid(data->reset_pin))
> - at91_set_gpio_output(data->reset_pin, 0);
> -
> - ac97_data = *data;
> - platform_device_register(&at91sam9g45_ac97_device);
> -}
> -#else
> -void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
> -#endif
> -
> -/* --------------------------------------------------------------------
> - * Image Sensor Interface
> - * -------------------------------------------------------------------- */
> -#if defined(CONFIG_VIDEO_ATMEL_ISI) || defined(CONFIG_VIDEO_ATMEL_ISI_MODULE)
> -static u64 isi_dmamask = DMA_BIT_MASK(32);
> -static struct isi_platform_data isi_data;
> -
> -struct resource isi_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_ISI,
> - .end = AT91SAM9G45_BASE_ISI + SZ_16K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at91sam9g45_isi_device = {
> - .name = "atmel_isi",
> - .id = 0,
> - .dev = {
> - .dma_mask = &isi_dmamask,
> - .coherent_dma_mask = DMA_BIT_MASK(32),
> - .platform_data = &isi_data,
> - },
> - .resource = isi_resources,
> - .num_resources = ARRAY_SIZE(isi_resources),
> -};
> -
> -static struct clk_lookup isi_mck_lookups[] = {
> - CLKDEV_CON_DEV_ID("isi_mck", "atmel_isi.0", NULL),
> -};
> -
> -void __init at91_add_device_isi(struct isi_platform_data *data,
> - bool use_pck_as_mck)
> -{
> - struct clk *pck;
> - struct clk *parent;
> -
> - if (!data)
> - return;
> - isi_data = *data;
> -
> - at91_set_A_periph(AT91_PIN_PB20, 0); /* ISI_D0 */
> - at91_set_A_periph(AT91_PIN_PB21, 0); /* ISI_D1 */
> - at91_set_A_periph(AT91_PIN_PB22, 0); /* ISI_D2 */
> - at91_set_A_periph(AT91_PIN_PB23, 0); /* ISI_D3 */
> - at91_set_A_periph(AT91_PIN_PB24, 0); /* ISI_D4 */
> - at91_set_A_periph(AT91_PIN_PB25, 0); /* ISI_D5 */
> - at91_set_A_periph(AT91_PIN_PB26, 0); /* ISI_D6 */
> - at91_set_A_periph(AT91_PIN_PB27, 0); /* ISI_D7 */
> - at91_set_A_periph(AT91_PIN_PB28, 0); /* ISI_PCK */
> - at91_set_A_periph(AT91_PIN_PB30, 0); /* ISI_HSYNC */
> - at91_set_A_periph(AT91_PIN_PB29, 0); /* ISI_VSYNC */
> - at91_set_B_periph(AT91_PIN_PB8, 0); /* ISI_PD8 */
> - at91_set_B_periph(AT91_PIN_PB9, 0); /* ISI_PD9 */
> - at91_set_B_periph(AT91_PIN_PB10, 0); /* ISI_PD10 */
> - at91_set_B_periph(AT91_PIN_PB11, 0); /* ISI_PD11 */
> -
> - platform_device_register(&at91sam9g45_isi_device);
> -
> - if (use_pck_as_mck) {
> - at91_set_B_periph(AT91_PIN_PB31, 0); /* ISI_MCK (PCK1) */
> -
> - pck = clk_get(NULL, "pck1");
> - parent = clk_get(NULL, "plla");
> -
> - BUG_ON(IS_ERR(pck) || IS_ERR(parent));
> -
> - if (clk_set_parent(pck, parent)) {
> - pr_err("Failed to set PCK's parent\n");
> - } else {
> - /* Register PCK as ISI_MCK */
> - isi_mck_lookups[0].clk = pck;
> - clkdev_add_table(isi_mck_lookups,
> - ARRAY_SIZE(isi_mck_lookups));
> - }
> -
> - clk_put(pck);
> - clk_put(parent);
> - }
> -}
> -#else
> -void __init at91_add_device_isi(struct isi_platform_data *data,
> - bool use_pck_as_mck) {}
> -#endif
> -
> -
> -/* --------------------------------------------------------------------
> - * LCD Controller
> - * -------------------------------------------------------------------- */
> -
> -#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
> -static u64 lcdc_dmamask = DMA_BIT_MASK(32);
> -static struct atmel_lcdfb_pdata lcdc_data;
> -
> -static struct resource lcdc_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_LCDC_BASE,
> - .end = AT91SAM9G45_LCDC_BASE + SZ_4K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at91_lcdc_device = {
> - .id = 0,
> - .dev = {
> - .dma_mask = &lcdc_dmamask,
> - .coherent_dma_mask = DMA_BIT_MASK(32),
> - .platform_data = &lcdc_data,
> - },
> - .resource = lcdc_resources,
> - .num_resources = ARRAY_SIZE(lcdc_resources),
> -};
> -
> -void __init at91_add_device_lcdc(struct atmel_lcdfb_pdata *data)
> -{
> - if (!data)
> - return;
> -
> - if (cpu_is_at91sam9g45es())
> - at91_lcdc_device.name = "at91sam9g45es-lcdfb";
> - else
> - at91_lcdc_device.name = "at91sam9g45-lcdfb";
> -
> - at91_set_A_periph(AT91_PIN_PE0, 0); /* LCDDPWR */
> -
> - at91_set_A_periph(AT91_PIN_PE2, 0); /* LCDCC */
> - at91_set_A_periph(AT91_PIN_PE3, 0); /* LCDVSYNC */
> - at91_set_A_periph(AT91_PIN_PE4, 0); /* LCDHSYNC */
> - at91_set_A_periph(AT91_PIN_PE5, 0); /* LCDDOTCK */
> - at91_set_A_periph(AT91_PIN_PE6, 0); /* LCDDEN */
> - at91_set_A_periph(AT91_PIN_PE7, 0); /* LCDD0 */
> - at91_set_A_periph(AT91_PIN_PE8, 0); /* LCDD1 */
> - at91_set_A_periph(AT91_PIN_PE9, 0); /* LCDD2 */
> - at91_set_A_periph(AT91_PIN_PE10, 0); /* LCDD3 */
> - at91_set_A_periph(AT91_PIN_PE11, 0); /* LCDD4 */
> - at91_set_A_periph(AT91_PIN_PE12, 0); /* LCDD5 */
> - at91_set_A_periph(AT91_PIN_PE13, 0); /* LCDD6 */
> - at91_set_A_periph(AT91_PIN_PE14, 0); /* LCDD7 */
> - at91_set_A_periph(AT91_PIN_PE15, 0); /* LCDD8 */
> - at91_set_A_periph(AT91_PIN_PE16, 0); /* LCDD9 */
> - at91_set_A_periph(AT91_PIN_PE17, 0); /* LCDD10 */
> - at91_set_A_periph(AT91_PIN_PE18, 0); /* LCDD11 */
> - at91_set_A_periph(AT91_PIN_PE19, 0); /* LCDD12 */
> - at91_set_A_periph(AT91_PIN_PE20, 0); /* LCDD13 */
> - at91_set_A_periph(AT91_PIN_PE21, 0); /* LCDD14 */
> - at91_set_A_periph(AT91_PIN_PE22, 0); /* LCDD15 */
> - at91_set_A_periph(AT91_PIN_PE23, 0); /* LCDD16 */
> - at91_set_A_periph(AT91_PIN_PE24, 0); /* LCDD17 */
> - at91_set_A_periph(AT91_PIN_PE25, 0); /* LCDD18 */
> - at91_set_A_periph(AT91_PIN_PE26, 0); /* LCDD19 */
> - at91_set_A_periph(AT91_PIN_PE27, 0); /* LCDD20 */
> - at91_set_A_periph(AT91_PIN_PE28, 0); /* LCDD21 */
> - at91_set_A_periph(AT91_PIN_PE29, 0); /* LCDD22 */
> - at91_set_A_periph(AT91_PIN_PE30, 0); /* LCDD23 */
> -
> - lcdc_data = *data;
> - platform_device_register(&at91_lcdc_device);
> -}
> -#else
> -void __init at91_add_device_lcdc(struct atmel_lcdfb_pdata *data) {}
> -#endif
> -
> -
> -/* --------------------------------------------------------------------
> - * Timer/Counter block
> - * -------------------------------------------------------------------- */
> -
> -#ifdef CONFIG_ATMEL_TCLIB
> -static struct resource tcb0_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_TCB0,
> - .end = AT91SAM9G45_BASE_TCB0 + SZ_256 - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at91sam9g45_tcb0_device = {
> - .name = "atmel_tcb",
> - .id = 0,
> - .resource = tcb0_resources,
> - .num_resources = ARRAY_SIZE(tcb0_resources),
> -};
> -
> -/* TCB1 begins with TC3 */
> -static struct resource tcb1_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_TCB1,
> - .end = AT91SAM9G45_BASE_TCB1 + SZ_256 - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at91sam9g45_tcb1_device = {
> - .name = "atmel_tcb",
> - .id = 1,
> - .resource = tcb1_resources,
> - .num_resources = ARRAY_SIZE(tcb1_resources),
> -};
> -
> -static void __init at91_add_device_tc(void)
> -{
> - platform_device_register(&at91sam9g45_tcb0_device);
> - platform_device_register(&at91sam9g45_tcb1_device);
> -}
> -#else
> -static void __init at91_add_device_tc(void) { }
> -#endif
> -
> -
> -/* --------------------------------------------------------------------
> - * RTC
> - * -------------------------------------------------------------------- */
> -
> -#if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
> -static struct resource rtc_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_RTC,
> - .end = AT91SAM9G45_BASE_RTC + SZ_256 - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91_ID_SYS,
> - .end = NR_IRQS_LEGACY + AT91_ID_SYS,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at91sam9g45_rtc_device = {
> - .name = "at91_rtc",
> - .id = -1,
> - .resource = rtc_resources,
> - .num_resources = ARRAY_SIZE(rtc_resources),
> -};
> -
> -static void __init at91_add_device_rtc(void)
> -{
> - platform_device_register(&at91sam9g45_rtc_device);
> -}
> -#else
> -static void __init at91_add_device_rtc(void) {}
> -#endif
> -
> -
> -/* --------------------------------------------------------------------
> - * ADC and touchscreen
> - * -------------------------------------------------------------------- */
> -
> -#if IS_ENABLED(CONFIG_AT91_ADC)
> -static struct at91_adc_data adc_data;
> -
> -static struct resource adc_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_TSC,
> - .end = AT91SAM9G45_BASE_TSC + SZ_16K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC,
> - .flags = IORESOURCE_IRQ,
> - }
> -};
> -
> -static struct platform_device at91_adc_device = {
> - .name = "at91sam9g45-adc",
> - .id = -1,
> - .dev = {
> - .platform_data = &adc_data,
> - },
> - .resource = adc_resources,
> - .num_resources = ARRAY_SIZE(adc_resources),
> -};
> -
> -static struct at91_adc_trigger at91_adc_triggers[] = {
> - [0] = {
> - .name = "external-rising",
> - .value = 1,
> - .is_external = true,
> - },
> - [1] = {
> - .name = "external-falling",
> - .value = 2,
> - .is_external = true,
> - },
> - [2] = {
> - .name = "external-any",
> - .value = 3,
> - .is_external = true,
> - },
> - [3] = {
> - .name = "continuous",
> - .value = 6,
> - .is_external = false,
> - },
> -};
> -
> -void __init at91_add_device_adc(struct at91_adc_data *data)
> -{
> - if (!data)
> - return;
> -
> - if (test_bit(0, &data->channels_used))
> - at91_set_gpio_input(AT91_PIN_PD20, 0);
> - if (test_bit(1, &data->channels_used))
> - at91_set_gpio_input(AT91_PIN_PD21, 0);
> - if (test_bit(2, &data->channels_used))
> - at91_set_gpio_input(AT91_PIN_PD22, 0);
> - if (test_bit(3, &data->channels_used))
> - at91_set_gpio_input(AT91_PIN_PD23, 0);
> - if (test_bit(4, &data->channels_used))
> - at91_set_gpio_input(AT91_PIN_PD24, 0);
> - if (test_bit(5, &data->channels_used))
> - at91_set_gpio_input(AT91_PIN_PD25, 0);
> - if (test_bit(6, &data->channels_used))
> - at91_set_gpio_input(AT91_PIN_PD26, 0);
> - if (test_bit(7, &data->channels_used))
> - at91_set_gpio_input(AT91_PIN_PD27, 0);
> -
> - if (data->use_external_triggers)
> - at91_set_A_periph(AT91_PIN_PD28, 0);
> -
> - data->startup_time = 40;
> - data->trigger_number = 4;
> - data->trigger_list = at91_adc_triggers;
> -
> - adc_data = *data;
> - platform_device_register(&at91_adc_device);
> -}
> -#else
> -void __init at91_add_device_adc(struct at91_adc_data *data) {}
> -#endif
> -
> -/* --------------------------------------------------------------------
> - * RTT
> - * -------------------------------------------------------------------- */
> -
> -static struct resource rtt_resources[] = {
> - {
> - .start = AT91SAM9G45_BASE_RTT,
> - .end = AT91SAM9G45_BASE_RTT + SZ_16 - 1,
> - .flags = IORESOURCE_MEM,
> - }, {
> - .flags = IORESOURCE_MEM,
> - }, {
> - .flags = IORESOURCE_IRQ,
> - }
> -};
> -
> -static struct platform_device at91sam9g45_rtt_device = {
> - .name = "at91_rtt",
> - .id = 0,
> - .resource = rtt_resources,
> -};
> -
> -#if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
> -static void __init at91_add_device_rtt_rtc(void)
> -{
> - at91sam9g45_rtt_device.name = "rtc-at91sam9";
> - /*
> - * The second resource is needed:
> - * GPBR will serve as the storage for RTC time offset
> - */
> - at91sam9g45_rtt_device.num_resources = 3;
> - rtt_resources[1].start = AT91SAM9G45_BASE_GPBR +
> - 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
> - rtt_resources[1].end = rtt_resources[1].start + 3;
> - rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
> - rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
> -}
> -#else
> -static void __init at91_add_device_rtt_rtc(void)
> -{
> - /* Only one resource is needed: RTT not used as RTC */
> - at91sam9g45_rtt_device.num_resources = 1;
> -}
> -#endif
> -
> -static void __init at91_add_device_rtt(void)
> -{
> - at91_add_device_rtt_rtc();
> - platform_device_register(&at91sam9g45_rtt_device);
> -}
> -
> -
> -/* --------------------------------------------------------------------
> - * TRNG
> - * -------------------------------------------------------------------- */
> -
> -#if defined(CONFIG_HW_RANDOM_ATMEL) || defined(CONFIG_HW_RANDOM_ATMEL_MODULE)
> -static struct resource trng_resources[] = {
> - {
> - .start = AT91SAM9G45_BASE_TRNG,
> - .end = AT91SAM9G45_BASE_TRNG + SZ_16K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> -};
> -
> -static struct platform_device at91sam9g45_trng_device = {
> - .name = "atmel-trng",
> - .id = -1,
> - .resource = trng_resources,
> - .num_resources = ARRAY_SIZE(trng_resources),
> -};
> -
> -static void __init at91_add_device_trng(void)
> -{
> - platform_device_register(&at91sam9g45_trng_device);
> -}
> -#else
> -static void __init at91_add_device_trng(void) {}
> -#endif
> -
> -/* --------------------------------------------------------------------
> - * Watchdog
> - * -------------------------------------------------------------------- */
> -
> -#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
> -static struct resource wdt_resources[] = {
> - {
> - .start = AT91SAM9G45_BASE_WDT,
> - .end = AT91SAM9G45_BASE_WDT + SZ_16 - 1,
> - .flags = IORESOURCE_MEM,
> - }
> -};
> -
> -static struct platform_device at91sam9g45_wdt_device = {
> - .name = "at91_wdt",
> - .id = -1,
> - .resource = wdt_resources,
> - .num_resources = ARRAY_SIZE(wdt_resources),
> -};
> -
> -static void __init at91_add_device_watchdog(void)
> -{
> - platform_device_register(&at91sam9g45_wdt_device);
> -}
> -#else
> -static void __init at91_add_device_watchdog(void) {}
> -#endif
> -
> -
> -/* --------------------------------------------------------------------
> - * PWM
> - * --------------------------------------------------------------------*/
> -
> -#if IS_ENABLED(CONFIG_PWM_ATMEL)
> -static struct resource pwm_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_PWMC,
> - .end = AT91SAM9G45_BASE_PWMC + SZ_16K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at91sam9g45_pwm0_device = {
> - .name = "at91sam9rl-pwm",
> - .id = -1,
> - .resource = pwm_resources,
> - .num_resources = ARRAY_SIZE(pwm_resources),
> -};
> -
> -void __init at91_add_device_pwm(u32 mask)
> -{
> - if (mask & (1 << AT91_PWM0))
> - at91_set_B_periph(AT91_PIN_PD24, 1); /* enable PWM0 */
> -
> - if (mask & (1 << AT91_PWM1))
> - at91_set_B_periph(AT91_PIN_PD31, 1); /* enable PWM1 */
> -
> - if (mask & (1 << AT91_PWM2))
> - at91_set_B_periph(AT91_PIN_PD26, 1); /* enable PWM2 */
> -
> - if (mask & (1 << AT91_PWM3))
> - at91_set_B_periph(AT91_PIN_PD0, 1); /* enable PWM3 */
> -
> - platform_device_register(&at91sam9g45_pwm0_device);
> -}
> -#else
> -void __init at91_add_device_pwm(u32 mask) {}
> -#endif
> -
> -
> -/* --------------------------------------------------------------------
> - * SSC -- Synchronous Serial Controller
> - * -------------------------------------------------------------------- */
> -
> -#if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
> -static u64 ssc0_dmamask = DMA_BIT_MASK(32);
> -
> -static struct resource ssc0_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_SSC0,
> - .end = AT91SAM9G45_BASE_SSC0 + SZ_16K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at91sam9g45_ssc0_device = {
> - .name = "at91sam9g45_ssc",
> - .id = 0,
> - .dev = {
> - .dma_mask = &ssc0_dmamask,
> - .coherent_dma_mask = DMA_BIT_MASK(32),
> - },
> - .resource = ssc0_resources,
> - .num_resources = ARRAY_SIZE(ssc0_resources),
> -};
> -
> -static inline void configure_ssc0_pins(unsigned pins)
> -{
> - if (pins & ATMEL_SSC_TF)
> - at91_set_A_periph(AT91_PIN_PD1, 1);
> - if (pins & ATMEL_SSC_TK)
> - at91_set_A_periph(AT91_PIN_PD0, 1);
> - if (pins & ATMEL_SSC_TD)
> - at91_set_A_periph(AT91_PIN_PD2, 1);
> - if (pins & ATMEL_SSC_RD)
> - at91_set_A_periph(AT91_PIN_PD3, 1);
> - if (pins & ATMEL_SSC_RK)
> - at91_set_A_periph(AT91_PIN_PD4, 1);
> - if (pins & ATMEL_SSC_RF)
> - at91_set_A_periph(AT91_PIN_PD5, 1);
> -}
> -
> -static u64 ssc1_dmamask = DMA_BIT_MASK(32);
> -
> -static struct resource ssc1_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_SSC1,
> - .end = AT91SAM9G45_BASE_SSC1 + SZ_16K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at91sam9g45_ssc1_device = {
> - .name = "at91sam9g45_ssc",
> - .id = 1,
> - .dev = {
> - .dma_mask = &ssc1_dmamask,
> - .coherent_dma_mask = DMA_BIT_MASK(32),
> - },
> - .resource = ssc1_resources,
> - .num_resources = ARRAY_SIZE(ssc1_resources),
> -};
> -
> -static inline void configure_ssc1_pins(unsigned pins)
> -{
> - if (pins & ATMEL_SSC_TF)
> - at91_set_A_periph(AT91_PIN_PD14, 1);
> - if (pins & ATMEL_SSC_TK)
> - at91_set_A_periph(AT91_PIN_PD12, 1);
> - if (pins & ATMEL_SSC_TD)
> - at91_set_A_periph(AT91_PIN_PD10, 1);
> - if (pins & ATMEL_SSC_RD)
> - at91_set_A_periph(AT91_PIN_PD11, 1);
> - if (pins & ATMEL_SSC_RK)
> - at91_set_A_periph(AT91_PIN_PD13, 1);
> - if (pins & ATMEL_SSC_RF)
> - at91_set_A_periph(AT91_PIN_PD15, 1);
> -}
> -
> -/*
> - * SSC controllers are accessed through library code, instead of any
> - * kind of all-singing/all-dancing driver. For example one could be
> - * used by a particular I2S audio codec's driver, while another one
> - * on the same system might be used by a custom data capture driver.
> - */
> -void __init at91_add_device_ssc(unsigned id, unsigned pins)
> -{
> - struct platform_device *pdev;
> -
> - /*
> - * NOTE: caller is responsible for passing information matching
> - * "pins" to whatever will be using each particular controller.
> - */
> - switch (id) {
> - case AT91SAM9G45_ID_SSC0:
> - pdev = &at91sam9g45_ssc0_device;
> - configure_ssc0_pins(pins);
> - break;
> - case AT91SAM9G45_ID_SSC1:
> - pdev = &at91sam9g45_ssc1_device;
> - configure_ssc1_pins(pins);
> - break;
> - default:
> - return;
> - }
> -
> - platform_device_register(pdev);
> -}
> -
> -#else
> -void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
> -#endif
> -
> -
> -/* --------------------------------------------------------------------
> - * UART
> - * -------------------------------------------------------------------- */
> -
> -#if defined(CONFIG_SERIAL_ATMEL)
> -static struct resource dbgu_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_DBGU,
> - .end = AT91SAM9G45_BASE_DBGU + SZ_512 - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91_ID_SYS,
> - .end = NR_IRQS_LEGACY + AT91_ID_SYS,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct atmel_uart_data dbgu_data = {
> - .use_dma_tx = 0,
> - .use_dma_rx = 0,
> -};
> -
> -static u64 dbgu_dmamask = DMA_BIT_MASK(32);
> -
> -static struct platform_device at91sam9g45_dbgu_device = {
> - .name = "atmel_usart",
> - .id = 0,
> - .dev = {
> - .dma_mask = &dbgu_dmamask,
> - .coherent_dma_mask = DMA_BIT_MASK(32),
> - .platform_data = &dbgu_data,
> - },
> - .resource = dbgu_resources,
> - .num_resources = ARRAY_SIZE(dbgu_resources),
> -};
> -
> -static inline void configure_dbgu_pins(void)
> -{
> - at91_set_A_periph(AT91_PIN_PB12, 0); /* DRXD */
> - at91_set_A_periph(AT91_PIN_PB13, 1); /* DTXD */
> -}
> -
> -static struct resource uart0_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_US0,
> - .end = AT91SAM9G45_BASE_US0 + SZ_16K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct atmel_uart_data uart0_data = {
> - .use_dma_tx = 1,
> - .use_dma_rx = 1,
> -};
> -
> -static u64 uart0_dmamask = DMA_BIT_MASK(32);
> -
> -static struct platform_device at91sam9g45_uart0_device = {
> - .name = "atmel_usart",
> - .id = 1,
> - .dev = {
> - .dma_mask = &uart0_dmamask,
> - .coherent_dma_mask = DMA_BIT_MASK(32),
> - .platform_data = &uart0_data,
> - },
> - .resource = uart0_resources,
> - .num_resources = ARRAY_SIZE(uart0_resources),
> -};
> -
> -static inline void configure_usart0_pins(unsigned pins)
> -{
> - at91_set_A_periph(AT91_PIN_PB19, 1); /* TXD0 */
> - at91_set_A_periph(AT91_PIN_PB18, 0); /* RXD0 */
> -
> - if (pins & ATMEL_UART_RTS)
> - at91_set_B_periph(AT91_PIN_PB17, 0); /* RTS0 */
> - if (pins & ATMEL_UART_CTS)
> - at91_set_B_periph(AT91_PIN_PB15, 0); /* CTS0 */
> -}
> -
> -static struct resource uart1_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_US1,
> - .end = AT91SAM9G45_BASE_US1 + SZ_16K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct atmel_uart_data uart1_data = {
> - .use_dma_tx = 1,
> - .use_dma_rx = 1,
> -};
> -
> -static u64 uart1_dmamask = DMA_BIT_MASK(32);
> -
> -static struct platform_device at91sam9g45_uart1_device = {
> - .name = "atmel_usart",
> - .id = 2,
> - .dev = {
> - .dma_mask = &uart1_dmamask,
> - .coherent_dma_mask = DMA_BIT_MASK(32),
> - .platform_data = &uart1_data,
> - },
> - .resource = uart1_resources,
> - .num_resources = ARRAY_SIZE(uart1_resources),
> -};
> -
> -static inline void configure_usart1_pins(unsigned pins)
> -{
> - at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD1 */
> - at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD1 */
> -
> - if (pins & ATMEL_UART_RTS)
> - at91_set_A_periph(AT91_PIN_PD16, 0); /* RTS1 */
> - if (pins & ATMEL_UART_CTS)
> - at91_set_A_periph(AT91_PIN_PD17, 0); /* CTS1 */
> -}
> -
> -static struct resource uart2_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_US2,
> - .end = AT91SAM9G45_BASE_US2 + SZ_16K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct atmel_uart_data uart2_data = {
> - .use_dma_tx = 1,
> - .use_dma_rx = 1,
> -};
> -
> -static u64 uart2_dmamask = DMA_BIT_MASK(32);
> -
> -static struct platform_device at91sam9g45_uart2_device = {
> - .name = "atmel_usart",
> - .id = 3,
> - .dev = {
> - .dma_mask = &uart2_dmamask,
> - .coherent_dma_mask = DMA_BIT_MASK(32),
> - .platform_data = &uart2_data,
> - },
> - .resource = uart2_resources,
> - .num_resources = ARRAY_SIZE(uart2_resources),
> -};
> -
> -static inline void configure_usart2_pins(unsigned pins)
> -{
> - at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD2 */
> - at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD2 */
> -
> - if (pins & ATMEL_UART_RTS)
> - at91_set_B_periph(AT91_PIN_PC9, 0); /* RTS2 */
> - if (pins & ATMEL_UART_CTS)
> - at91_set_B_periph(AT91_PIN_PC11, 0); /* CTS2 */
> -}
> -
> -static struct resource uart3_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_US3,
> - .end = AT91SAM9G45_BASE_US3 + SZ_16K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct atmel_uart_data uart3_data = {
> - .use_dma_tx = 1,
> - .use_dma_rx = 1,
> -};
> -
> -static u64 uart3_dmamask = DMA_BIT_MASK(32);
> -
> -static struct platform_device at91sam9g45_uart3_device = {
> - .name = "atmel_usart",
> - .id = 4,
> - .dev = {
> - .dma_mask = &uart3_dmamask,
> - .coherent_dma_mask = DMA_BIT_MASK(32),
> - .platform_data = &uart3_data,
> - },
> - .resource = uart3_resources,
> - .num_resources = ARRAY_SIZE(uart3_resources),
> -};
> -
> -static inline void configure_usart3_pins(unsigned pins)
> -{
> - at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD3 */
> - at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD3 */
> -
> - if (pins & ATMEL_UART_RTS)
> - at91_set_B_periph(AT91_PIN_PA23, 0); /* RTS3 */
> - if (pins & ATMEL_UART_CTS)
> - at91_set_B_periph(AT91_PIN_PA24, 0); /* CTS3 */
> -}
> -
> -static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
> -
> -void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
> -{
> - struct platform_device *pdev;
> - struct atmel_uart_data *pdata;
> -
> - switch (id) {
> - case 0: /* DBGU */
> - pdev = &at91sam9g45_dbgu_device;
> - configure_dbgu_pins();
> - break;
> - case AT91SAM9G45_ID_US0:
> - pdev = &at91sam9g45_uart0_device;
> - configure_usart0_pins(pins);
> - break;
> - case AT91SAM9G45_ID_US1:
> - pdev = &at91sam9g45_uart1_device;
> - configure_usart1_pins(pins);
> - break;
> - case AT91SAM9G45_ID_US2:
> - pdev = &at91sam9g45_uart2_device;
> - configure_usart2_pins(pins);
> - break;
> - case AT91SAM9G45_ID_US3:
> - pdev = &at91sam9g45_uart3_device;
> - configure_usart3_pins(pins);
> - break;
> - default:
> - return;
> - }
> - pdata = pdev->dev.platform_data;
> - pdata->num = portnr; /* update to mapped ID */
> -
> - if (portnr < ATMEL_MAX_UART)
> - at91_uarts[portnr] = pdev;
> -}
> -
> -void __init at91_add_device_serial(void)
> -{
> - int i;
> -
> - for (i = 0; i < ATMEL_MAX_UART; i++) {
> - if (at91_uarts[i])
> - platform_device_register(at91_uarts[i]);
> - }
> -}
> -#else
> -void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
> -void __init at91_add_device_serial(void) {}
> -#endif
> -
> -/* --------------------------------------------------------------------
> - * SHA1/SHA256
> - * -------------------------------------------------------------------- */
> -
> -#if defined(CONFIG_CRYPTO_DEV_ATMEL_SHA) || defined(CONFIG_CRYPTO_DEV_ATMEL_SHA_MODULE)
> -static struct resource sha_resources[] = {
> - {
> - .start = AT91SAM9G45_BASE_SHA,
> - .end = AT91SAM9G45_BASE_SHA + SZ_16K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at91sam9g45_sha_device = {
> - .name = "atmel_sha",
> - .id = -1,
> - .resource = sha_resources,
> - .num_resources = ARRAY_SIZE(sha_resources),
> -};
> -
> -static void __init at91_add_device_sha(void)
> -{
> - platform_device_register(&at91sam9g45_sha_device);
> -}
> -#else
> -static void __init at91_add_device_sha(void) {}
> -#endif
> -
> -/* --------------------------------------------------------------------
> - * DES/TDES
> - * -------------------------------------------------------------------- */
> -
> -#if defined(CONFIG_CRYPTO_DEV_ATMEL_TDES) || defined(CONFIG_CRYPTO_DEV_ATMEL_TDES_MODULE)
> -static struct resource tdes_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_TDES,
> - .end = AT91SAM9G45_BASE_TDES + SZ_16K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at91sam9g45_tdes_device = {
> - .name = "atmel_tdes",
> - .id = -1,
> - .resource = tdes_resources,
> - .num_resources = ARRAY_SIZE(tdes_resources),
> -};
> -
> -static void __init at91_add_device_tdes(void)
> -{
> - platform_device_register(&at91sam9g45_tdes_device);
> -}
> -#else
> -static void __init at91_add_device_tdes(void) {}
> -#endif
> -
> -/* --------------------------------------------------------------------
> - * AES
> - * -------------------------------------------------------------------- */
> -
> -#if defined(CONFIG_CRYPTO_DEV_ATMEL_AES) || defined(CONFIG_CRYPTO_DEV_ATMEL_AES_MODULE)
> -static struct crypto_platform_data aes_data;
> -static struct crypto_dma_data alt_atslave;
> -static u64 aes_dmamask = DMA_BIT_MASK(32);
> -
> -static struct resource aes_resources[] = {
> - [0] = {
> - .start = AT91SAM9G45_BASE_AES,
> - .end = AT91SAM9G45_BASE_AES + SZ_16K - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
> - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AESTDESSHA,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct platform_device at91sam9g45_aes_device = {
> - .name = "atmel_aes",
> - .id = -1,
> - .dev = {
> - .dma_mask = &aes_dmamask,
> - .coherent_dma_mask = DMA_BIT_MASK(32),
> - .platform_data = &aes_data,
> - },
> - .resource = aes_resources,
> - .num_resources = ARRAY_SIZE(aes_resources),
> -};
> -
> -static void __init at91_add_device_aes(void)
> -{
> - struct at_dma_slave *atslave;
> -
> - /* DMA TX slave channel configuration */
> - atslave = &alt_atslave.txdata;
> - atslave->dma_dev = &at_hdmac_device.dev;
> - atslave->cfg = ATC_FIFOCFG_ENOUGHSPACE | ATC_SRC_H2SEL_HW |
> - ATC_SRC_PER(AT_DMA_ID_AES_RX);
> -
> - /* DMA RX slave channel configuration */
> - atslave = &alt_atslave.rxdata;
> - atslave->dma_dev = &at_hdmac_device.dev;
> - atslave->cfg = ATC_FIFOCFG_ENOUGHSPACE | ATC_DST_H2SEL_HW |
> - ATC_DST_PER(AT_DMA_ID_AES_TX);
> -
> - aes_data.dma_slave = &alt_atslave;
> - platform_device_register(&at91sam9g45_aes_device);
> -}
> -#else
> -static void __init at91_add_device_aes(void) {}
> -#endif
> -
> -/* -------------------------------------------------------------------- */
> -/*
> - * These devices are always present and don't need any board-specific
> - * setup.
> - */
> -static int __init at91_add_standard_devices(void)
> -{
> - if (of_have_populated_dt())
> - return 0;
> -
> - at91_add_device_hdmac();
> - at91_add_device_rtc();
> - at91_add_device_rtt();
> - at91_add_device_trng();
> - at91_add_device_watchdog();
> - at91_add_device_tc();
> - at91_add_device_sha();
> - at91_add_device_tdes();
> - at91_add_device_aes();
> - return 0;
> -}
> -
> -arch_initcall(at91_add_standard_devices);
> diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c
> deleted file mode 100644
> index b227732..0000000
> --- a/arch/arm/mach-at91/board-sam9m10g45ek.c
> +++ /dev/null
> @@ -1,526 +0,0 @@
> -/*
> - * Board-specific setup code for the AT91SAM9M10G45 Evaluation Kit family
> - *
> - * Covers: * AT91SAM9G45-EKES board
> - * * AT91SAM9M10G45-EK board
> - *
> - * Copyright (C) 2009 Atmel Corporation.
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License as published by
> - * the Free Software Foundation; either version 2 of the License, or
> - * (at your option) any later version.
> - *
> - */
> -
> -#include <linux/types.h>
> -#include <linux/gpio.h>
> -#include <linux/init.h>
> -#include <linux/mm.h>
> -#include <linux/module.h>
> -#include <linux/platform_device.h>
> -#include <linux/spi/spi.h>
> -#include <linux/fb.h>
> -#include <linux/gpio_keys.h>
> -#include <linux/input.h>
> -#include <linux/leds.h>
> -#include <linux/atmel-mci.h>
> -#include <linux/delay.h>
> -#include <linux/pwm.h>
> -#include <linux/leds_pwm.h>
> -
> -#include <linux/platform_data/at91_adc.h>
> -
> -#include <mach/hardware.h>
> -#include <video/atmel_lcdc.h>
> -#include <media/soc_camera.h>
> -#include <media/atmel-isi.h>
> -
> -#include <asm/setup.h>
> -#include <asm/mach-types.h>
> -#include <asm/irq.h>
> -
> -#include <asm/mach/arch.h>
> -#include <asm/mach/map.h>
> -#include <asm/mach/irq.h>
> -
> -#include <mach/at91sam9_smc.h>
> -#include <mach/system_rev.h>
> -
> -#include "at91_aic.h"
> -#include "at91_shdwc.h"
> -#include "board.h"
> -#include "sam9_smc.h"
> -#include "generic.h"
> -#include "gpio.h"
> -
> -
> -static void __init ek_init_early(void)
> -{
> - /* Initialize processor: 12.000 MHz crystal */
> - at91_initialize(12000000);
> -}
> -
> -/*
> - * USB HS Host port (common to OHCI & EHCI)
> - */
> -static struct at91_usbh_data __initdata ek_usbh_hs_data = {
> - .ports = 2,
> - .vbus_pin = {AT91_PIN_PD1, AT91_PIN_PD3},
> - .vbus_pin_active_low = {1, 1},
> - .overcurrent_pin= {-EINVAL, -EINVAL},
> -};
> -
> -
> -/*
> - * USB HS Device port
> - */
> -static struct usba_platform_data __initdata ek_usba_udc_data = {
> - .vbus_pin = AT91_PIN_PB19,
> -};
> -
> -
> -/*
> - * SPI devices.
> - */
> -static struct spi_board_info ek_spi_devices[] = {
> - { /* DataFlash chip */
> - .modalias = "mtd_dataflash",
> - .chip_select = 0,
> - .max_speed_hz = 15 * 1000 * 1000,
> - .bus_num = 0,
> - },
> -};
> -
> -
> -/*
> - * MCI (SD/MMC)
> - */
> -static struct mci_platform_data __initdata mci0_data = {
> - .slot[0] = {
> - .bus_width = 4,
> - .detect_pin = AT91_PIN_PD10,
> - .wp_pin = -EINVAL,
> - },
> -};
> -
> -static struct mci_platform_data __initdata mci1_data = {
> - .slot[0] = {
> - .bus_width = 4,
> - .detect_pin = AT91_PIN_PD11,
> - .wp_pin = AT91_PIN_PD29,
> - },
> -};
> -
> -
> -/*
> - * MACB Ethernet device
> - */
> -static struct macb_platform_data __initdata ek_macb_data = {
> - .phy_irq_pin = AT91_PIN_PD5,
> - .is_rmii = 1,
> -};
> -
> -
> -/*
> - * NAND flash
> - */
> -static struct mtd_partition __initdata ek_nand_partition[] = {
> - {
> - .name = "Partition 1",
> - .offset = 0,
> - .size = SZ_64M,
> - },
> - {
> - .name = "Partition 2",
> - .offset = MTDPART_OFS_NXTBLK,
> - .size = MTDPART_SIZ_FULL,
> - },
> -};
> -
> -/* det_pin is not connected */
> -static struct atmel_nand_data __initdata ek_nand_data = {
> - .ale = 21,
> - .cle = 22,
> - .rdy_pin = AT91_PIN_PC8,
> - .enable_pin = AT91_PIN_PC14,
> - .det_pin = -EINVAL,
> - .ecc_mode = NAND_ECC_SOFT,
> - .on_flash_bbt = 1,
> - .parts = ek_nand_partition,
> - .num_parts = ARRAY_SIZE(ek_nand_partition),
> -};
> -
> -static struct sam9_smc_config __initdata ek_nand_smc_config = {
> - .ncs_read_setup = 0,
> - .nrd_setup = 2,
> - .ncs_write_setup = 0,
> - .nwe_setup = 2,
> -
> - .ncs_read_pulse = 4,
> - .nrd_pulse = 4,
> - .ncs_write_pulse = 4,
> - .nwe_pulse = 4,
> -
> - .read_cycle = 7,
> - .write_cycle = 7,
> -
> - .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
> - .tdf_cycles = 3,
> -};
> -
> -static void __init ek_add_device_nand(void)
> -{
> - ek_nand_data.bus_width_16 = board_have_nand_16bit();
> - /* setup bus-width (8 or 16) */
> - if (ek_nand_data.bus_width_16)
> - ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
> - else
> - ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
> -
> - /* configure chip-select 3 (NAND) */
> - sam9_smc_configure(0, 3, &ek_nand_smc_config);
> -
> - at91_add_device_nand(&ek_nand_data);
> -}
> -
> -
> -/*
> - * ISI
> - */
> -static struct isi_platform_data __initdata isi_data = {
> - .frate = ISI_CFG1_FRATE_CAPTURE_ALL,
> - /* to use codec and preview path simultaneously */
> - .full_mode = 1,
> - .data_width_flags = ISI_DATAWIDTH_8 | ISI_DATAWIDTH_10,
> - /* ISI_MCK is provided by programmable clock or external clock */
> - .mck_hz = 25000000,
> -};
> -
> -
> -/*
> - * soc-camera OV2640
> - */
> -#if defined(CONFIG_SOC_CAMERA_OV2640) || \
> - defined(CONFIG_SOC_CAMERA_OV2640_MODULE)
> -static unsigned long isi_camera_query_bus_param(struct soc_camera_link *link)
> -{
> - /* ISI board for ek using default 8-bits connection */
> - return SOCAM_DATAWIDTH_8;
> -}
> -
> -static int i2c_camera_power(struct device *dev, int on)
> -{
> - /* enable or disable the camera */
> - pr_debug("%s: %s the camera\n", __func__, on ? "ENABLE" : "DISABLE");
> - at91_set_gpio_output(AT91_PIN_PD13, !on);
> -
> - if (!on)
> - goto out;
> -
> - /* If enabled, give a reset impulse */
> - at91_set_gpio_output(AT91_PIN_PD12, 0);
> - msleep(20);
> - at91_set_gpio_output(AT91_PIN_PD12, 1);
> - msleep(100);
> -
> -out:
> - return 0;
> -}
> -
> -static struct i2c_board_info i2c_camera = {
> - I2C_BOARD_INFO("ov2640", 0x30),
> -};
> -
> -static struct soc_camera_link iclink_ov2640 = {
> - .bus_id = 0,
> - .board_info = &i2c_camera,
> - .i2c_adapter_id = 0,
> - .power = i2c_camera_power,
> - .query_bus_param = isi_camera_query_bus_param,
> -};
> -
> -static struct platform_device isi_ov2640 = {
> - .name = "soc-camera-pdrv",
> - .id = 0,
> - .dev = {
> - .platform_data = &iclink_ov2640,
> - },
> -};
> -#endif
> -
> -
> -/*
> - * LCD Controller
> - */
> -#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
> -static struct fb_videomode at91_tft_vga_modes[] = {
> - {
> - .name = "LG",
> - .refresh = 60,
> - .xres = 480, .yres = 272,
> - .pixclock = KHZ2PICOS(9000),
> -
> - .left_margin = 1, .right_margin = 1,
> - .upper_margin = 40, .lower_margin = 1,
> - .hsync_len = 45, .vsync_len = 1,
> -
> - .sync = 0,
> - .vmode = FB_VMODE_NONINTERLACED,
> - },
> -};
> -
> -static struct fb_monspecs at91fb_default_monspecs = {
> - .manufacturer = "LG",
> - .monitor = "LB043WQ1",
> -
> - .modedb = at91_tft_vga_modes,
> - .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
> - .hfmin = 15000,
> - .hfmax = 17640,
> - .vfmin = 57,
> - .vfmax = 67,
> -};
> -
> -#define AT91SAM9G45_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
> - | ATMEL_LCDC_DISTYPE_TFT \
> - | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
> -
> -/* Driver datas */
> -static struct atmel_lcdfb_pdata __initdata ek_lcdc_data = {
> - .lcdcon_is_backlight = true,
> - .default_bpp = 32,
> - .default_dmacon = ATMEL_LCDC_DMAEN,
> - .default_lcdcon2 = AT91SAM9G45_DEFAULT_LCDCON2,
> - .default_monspecs = &at91fb_default_monspecs,
> - .guard_time = 9,
> - .lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB,
> -};
> -
> -#else
> -static struct atmel_lcdfb_pdata __initdata ek_lcdc_data;
> -#endif
> -
> -
> -/*
> - * ADCs and touchscreen
> - */
> -static struct at91_adc_data ek_adc_data = {
> - .channels_used = BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6) | BIT(7),
> - .use_external_triggers = true,
> - .vref = 3300,
> - .touchscreen_type = ATMEL_ADC_TOUCHSCREEN_4WIRE,
> -};
> -
> -/*
> - * GPIO Buttons
> - */
> -#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
> -static struct gpio_keys_button ek_buttons[] = {
> - { /* BP1, "leftclic" */
> - .code = BTN_LEFT,
> - .gpio = AT91_PIN_PB6,
> - .active_low = 1,
> - .desc = "left_click",
> - .wakeup = 1,
> - },
> - { /* BP2, "rightclic" */
> - .code = BTN_RIGHT,
> - .gpio = AT91_PIN_PB7,
> - .active_low = 1,
> - .desc = "right_click",
> - .wakeup = 1,
> - },
> - /* BP3, "joystick" */
> - {
> - .code = KEY_LEFT,
> - .gpio = AT91_PIN_PB14,
> - .active_low = 1,
> - .desc = "Joystick Left",
> - },
> - {
> - .code = KEY_RIGHT,
> - .gpio = AT91_PIN_PB15,
> - .active_low = 1,
> - .desc = "Joystick Right",
> - },
> - {
> - .code = KEY_UP,
> - .gpio = AT91_PIN_PB16,
> - .active_low = 1,
> - .desc = "Joystick Up",
> - },
> - {
> - .code = KEY_DOWN,
> - .gpio = AT91_PIN_PB17,
> - .active_low = 1,
> - .desc = "Joystick Down",
> - },
> - {
> - .code = KEY_ENTER,
> - .gpio = AT91_PIN_PB18,
> - .active_low = 1,
> - .desc = "Joystick Press",
> - },
> -};
> -
> -static struct gpio_keys_platform_data ek_button_data = {
> - .buttons = ek_buttons,
> - .nbuttons = ARRAY_SIZE(ek_buttons),
> -};
> -
> -static struct platform_device ek_button_device = {
> - .name = "gpio-keys",
> - .id = -1,
> - .num_resources = 0,
> - .dev = {
> - .platform_data = &ek_button_data,
> - }
> -};
> -
> -static void __init ek_add_device_buttons(void)
> -{
> - int i;
> -
> - for (i = 0; i < ARRAY_SIZE(ek_buttons); i++) {
> - at91_set_GPIO_periph(ek_buttons[i].gpio, 1);
> - at91_set_deglitch(ek_buttons[i].gpio, 1);
> - }
> -
> - platform_device_register(&ek_button_device);
> -}
> -#else
> -static void __init ek_add_device_buttons(void) {}
> -#endif
> -
> -
> -/*
> - * AC97
> - * reset_pin is not connected: NRST
> - */
> -static struct ac97c_platform_data ek_ac97_data = {
> - .reset_pin = -EINVAL,
> -};
> -
> -
> -/*
> - * LEDs ... these could all be PWM-driven, for variable brightness
> - */
> -static struct gpio_led ek_leds[] = {
> - { /* "top" led, red, powerled */
> - .name = "d8",
> - .gpio = AT91_PIN_PD30,
> - .default_trigger = "heartbeat",
> - },
> - { /* "left" led, green, userled2, pwm3 */
> - .name = "d6",
> - .gpio = AT91_PIN_PD0,
> - .active_low = 1,
> - .default_trigger = "nand-disk",
> - },
> -#if !IS_ENABLED(CONFIG_LEDS_PWM)
> - { /* "right" led, green, userled1, pwm1 */
> - .name = "d7",
> - .gpio = AT91_PIN_PD31,
> - .active_low = 1,
> - .default_trigger = "mmc0",
> - },
> -#endif
> -};
> -
> -
> -/*
> - * PWM Leds
> - */
> -static struct pwm_lookup pwm_lookup[] = {
> - PWM_LOOKUP("at91sam9rl-pwm", 1, "leds_pwm", "d7",
> - 5000, PWM_POLARITY_INVERSED),
> -};
> -
> -#if IS_ENABLED(CONFIG_LEDS_PWM)
> -static struct led_pwm pwm_leds[] = {
> - { /* "right" led, green, userled1, pwm1 */
> - .name = "d7",
> - .max_brightness = 255,
> - },
> -};
> -
> -static struct led_pwm_platform_data pwm_data = {
> - .num_leds = ARRAY_SIZE(pwm_leds),
> - .leds = pwm_leds,
> -};
> -
> -static struct platform_device leds_pwm = {
> - .name = "leds_pwm",
> - .id = -1,
> - .dev = {
> - .platform_data = &pwm_data,
> - },
> -};
> -#endif
> -
> -static struct platform_device *devices[] __initdata = {
> -#if defined(CONFIG_SOC_CAMERA_OV2640) || \
> - defined(CONFIG_SOC_CAMERA_OV2640_MODULE)
> - &isi_ov2640,
> -#endif
> -#if IS_ENABLED(CONFIG_LEDS_PWM)
> - &leds_pwm,
> -#endif
> -};
> -
> -static void __init ek_board_init(void)
> -{
> - /* Serial */
> - /* DGBU on ttyS0. (Rx & Tx only) */
> - at91_register_uart(0, 0, 0);
> -
> - /* USART0 not connected on the -EK board */
> - /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
> - at91_register_uart(AT91SAM9G45_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
> - at91_add_device_serial();
> - /* USB HS Host */
> - at91_add_device_usbh_ohci(&ek_usbh_hs_data);
> - at91_add_device_usbh_ehci(&ek_usbh_hs_data);
> - /* USB HS Device */
> - at91_add_device_usba(&ek_usba_udc_data);
> - /* SPI */
> - at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
> - /* MMC */
> - at91_add_device_mci(0, &mci0_data);
> - at91_add_device_mci(1, &mci1_data);
> - /* Ethernet */
> - at91_add_device_eth(&ek_macb_data);
> - /* NAND */
> - ek_add_device_nand();
> - /* I2C */
> - at91_add_device_i2c(0, NULL, 0);
> - /* ISI, using programmable clock as ISI_MCK */
> - at91_add_device_isi(&isi_data, true);
> - /* LCD Controller */
> - at91_add_device_lcdc(&ek_lcdc_data);
> - /* ADC and touchscreen */
> - at91_add_device_adc(&ek_adc_data);
> - /* Push Buttons */
> - ek_add_device_buttons();
> - /* AC97 */
> - at91_add_device_ac97(&ek_ac97_data);
> - /* LEDs */
> - at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
> - pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
> -#if IS_ENABLED(CONFIG_LEDS_PWM)
> - at91_add_device_pwm(1 << AT91_PWM1);
> -#endif
> - /* Other platform devices */
> - platform_add_devices(devices, ARRAY_SIZE(devices));
> -}
> -
> -MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK")
> - /* Maintainer: Atmel */
> - .init_time = at91sam926x_pit_init,
> - .map_io = at91_map_io,
> - .handle_irq = at91_aic_handle_irq,
> - .init_early = ek_init_early,
> - .init_irq = at91_init_irq_default,
> - .init_machine = ek_board_init,
> -MACHINE_END
>

--
Nicolas Ferre
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