[Patch Part2 v5 06/31] x86, irq: Save destination CPU ID in irq_cfg

From: Jiang Liu
Date: Thu Nov 06 2014 - 09:18:56 EST


Cache destination CPU APIC ID into struct irq_cfg when assigning vector
for interrupt. Upper layer just needs to read the cached APIC ID instead
of calling apic->cpu_mask_to_apicid_and(), it helps to hide APIC driver
details from IOAPIC/HPET/MSI drivers..

Signed-off-by: Jiang Liu <jiang.liu@xxxxxxxxxxxxxxx>
---
arch/x86/include/asm/hw_irq.h | 1 +
arch/x86/kernel/apic/vector.c | 6 ++++++
2 files changed, 7 insertions(+)

diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index 9662290e0b20..b988ddf7434b 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -116,6 +116,7 @@ struct irq_data;
struct irq_cfg {
cpumask_var_t domain;
cpumask_var_t old_domain;
+ unsigned int dest_apicid;
u8 vector;
u8 move_in_progress : 1;
#ifdef CONFIG_IRQ_REMAP
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c
index 6cedd7914581..c724ef6b218c 100644
--- a/arch/x86/kernel/apic/vector.c
+++ b/arch/x86/kernel/apic/vector.c
@@ -188,6 +188,12 @@ next:
}
free_cpumask_var(tmp_mask);

+ if (!err) {
+ /* cache destination APIC IDs into cfg->dest_apicid */
+ err = apic->cpu_mask_to_apicid_and(mask, cfg->domain,
+ &cfg->dest_apicid);
+ }
+
return err;
}

--
1.7.10.4

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