[tip:x86/mm] x86: Use new cache mode type in arch/x86/pci

From: tip-bot for Juergen Gross
Date: Sun Nov 16 2014 - 05:55:56 EST

Commit-ID: 1c64216be16404df7fab33c793890bb5076e8123
Gitweb: http://git.kernel.org/tip/1c64216be16404df7fab33c793890bb5076e8123
Author: Juergen Gross <jgross@xxxxxxxx>
AuthorDate: Mon, 3 Nov 2014 14:01:51 +0100
Committer: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
CommitDate: Sun, 16 Nov 2014 11:04:25 +0100

x86: Use new cache mode type in arch/x86/pci

Instead of directly using the cache mode bits in the pte switch to
using the cache mode type.

Based-on-patch-by: Stefan Bader <stefan.bader@xxxxxxxxxxxxx>
Signed-off-by: Juergen Gross <jgross@xxxxxxxx>
Reviewed-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
Cc: stefan.bader@xxxxxxxxxxxxx
Cc: xen-devel@xxxxxxxxxxxxxxxxxxx
Cc: konrad.wilk@xxxxxxxxxx
Cc: ville.syrjala@xxxxxxxxxxxxxxx
Cc: david.vrabel@xxxxxxxxxx
Cc: jbeulich@xxxxxxxx
Cc: toshi.kani@xxxxxx
Cc: plagnioj@xxxxxxxxxxxx
Cc: tomi.valkeinen@xxxxxx
Cc: bhelgaas@xxxxxxxxxx
Link: http://lkml.kernel.org/r/1415019724-4317-6-git-send-email-jgross@xxxxxxxx
Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
arch/x86/pci/i386.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
index 37c1435..9b18ef3 100644
--- a/arch/x86/pci/i386.c
+++ b/arch/x86/pci/i386.c
@@ -433,14 +433,14 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
return -EINVAL;

if (pat_enabled && write_combine)
- prot |= _PAGE_CACHE_WC;
+ prot |= cachemode2protval(_PAGE_CACHE_MODE_WC);
else if (pat_enabled || boot_cpu_data.x86 > 3)
* ioremap() and ioremap_nocache() defaults to UC MINUS for now.
* To avoid attribute conflicts, request UC MINUS here
* as well.
+ prot |= cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS);

vma->vm_page_prot = __pgprot(prot);

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