Re: [PATCH 3.4 115/176] spi: dw: Fix detecting FIFO depth
From: Zefan Li
Date: Thu Apr 09 2015 - 21:52:24 EST
On 2015/4/9 17:37, Axel Lin wrote:
> 2015-04-09 16:46 GMT+08:00 <lizf@xxxxxxxxxx>:
>> From: Axel Lin <axel.lin@xxxxxxxxxx>
>> 3.4.107-rc1 review patch. If anyone has any objections, please let me know.
>> commit d297933cc7fcfbaaf2d37570baac73287bf0357d upstream.
>> Current code tries to find the highest valid fifo depth by checking the value
>> it wrote to DW_SPI_TXFLTR. There are a few problems in current code:
>> 1) There is an off-by-one in dws->fifo_len setting because it assumes the latest
>> register write fails so the latest valid value should be fifo - 1.
>> 2) We know the depth could be from 2 to 256 from HW spec, so it is not necessary
>> to test fifo == 257. In the case fifo is 257, it means the latest valid
>> setting is fifo = 256. So after the for loop iteration, we should check
>> fifo == 2 case instead of fifo == 257 if detecting the FIFO depth fails.
>> This patch fixes above issues.
>> Signed-off-by: Axel Lin <axel.lin@xxxxxxxxxx>
>> Reviewed-and-tested-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
>> Signed-off-by: Mark Brown <broonie@xxxxxxxxxx>
>> [lizf: Backported to 3.4: adjust context]
>> Signed-off-by: Zefan Li <lizefan@xxxxxxxxxx>
> This patch needs below fix:
Already queued. :)
See "[PATCH 3.4 173/176] spi: dw: revisit FIFO size detection again"
Thanks for your review!
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