Re: [PATCH 3/8] x86: Add intrinsics/macros for new rd/wr fs/gs base instructions

From: Andy Lutomirski
Date: Fri Apr 10 2015 - 15:07:19 EST


On Fri, Apr 10, 2015 at 8:50 AM, Andi Kleen <andi@xxxxxxxxxxxxxx> wrote:
> From: Andi Kleen <ak@xxxxxxxxxxxxxxx>
>
> Add C intrinsics and assembler macros for the new rd/wr fs/gs base
> instructions and for swapgs.
>
> Very straight forward. Used in followon patch.
>
> For assembler only a few standard registers used by entry_64.S
> are defined.
>
> Signed-off-by: Andi Kleen <ak@xxxxxxxxxxxxxxx>
> ---
> arch/x86/include/asm/fsgs.h | 54 +++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 54 insertions(+)
> create mode 100644 arch/x86/include/asm/fsgs.h
>
> diff --git a/arch/x86/include/asm/fsgs.h b/arch/x86/include/asm/fsgs.h
> new file mode 100644
> index 0000000..1df5085
> --- /dev/null
> +++ b/arch/x86/include/asm/fsgs.h
> @@ -0,0 +1,54 @@
> +#ifndef _ASM_FSGS_H
> +#define _ASM_FSGS_H 1
> +
> +#ifndef __ASSEMBLY__
> +
> +static inline void swapgs(void)
> +{
> + asm volatile("swapgs" ::: "memory");
> +}
> +
> +/* Must be protected by X86_FEATURE_FSGSBASE check. */
> +
> +static inline unsigned long rdgsbase(void)
> +{
> + unsigned long gs;
> + asm volatile(".byte 0xf3,0x48,0x0f,0xae,0xc8 # rdgsbaseq %%rax"
> + : "=a" (gs)
> + :: "memory");
> + return gs;
> +}
> +
> +static inline unsigned long rdfsbase(void)
> +{
> + unsigned long fs;
> + asm volatile(".byte 0xf3,0x48,0x0f,0xae,0xc0 # rdfsbaseq %%rax"
> + : "=a" (fs)
> + :: "memory");
> + return fs;
> +}
> +
> +static inline void wrgsbase(unsigned long gs)
> +{
> + asm volatile(".byte 0xf3,0x48,0x0f,0xae,0xd8 # wrgsbaseq %%rax"
> + :: "a" (gs)
> + : "memory");
> +}
> +
> +static inline void wrfsbase(unsigned long fs)
> +{
> + asm volatile(".byte 0xf3,0x48,0x0f,0xae,0xd0 # wrfsbaseq %%rax"
> + :: "a" (fs)
> + : "memory");
> +}

I think several of these should either be always_inline or have
tracing and kprobes disabled.

--Andy
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