[PATCH v2 05/19] clk: tegra: pll: update warning msg

From: Rhyland Klein
Date: Wed Apr 29 2015 - 13:29:33 EST


Swap out the generic WARN_ON with a WARN which gives more
information about what is happening.

Signed-off-by: Rhyland Klein <rklein@xxxxxxxxxx>
---
drivers/clk/tegra/clk-pll.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
index 1e1018dd466f..0282d9f4f2d7 100644
--- a/drivers/clk/tegra/clk-pll.c
+++ b/drivers/clk/tegra/clk-pll.c
@@ -692,7 +692,8 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,

pdiv = _hw_to_p_div(hw, cfg.p);
if (pdiv < 0) {
- WARN_ON(1);
+ WARN(1, "Clock %s has invalid pdiv value : 0x%x\n",
+ __clk_get_name(hw->clk), cfg.p);
pdiv = 1;
}

--
1.7.9.5

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