Re: [PATCH V7 4/9] mfd: Add binding document for NVIDIA Tegra XUSB
From: Andrew Bresticker
Date: Wed Apr 29 2015 - 15:46:57 EST
On Wed, Apr 29, 2015 at 11:34 AM, Lee Jones <lee.jones@xxxxxxxxxx> wrote:
> On Wed, 29 Apr 2015, Andrew Bresticker wrote:
>> On Wed, Apr 29, 2015 at 2:25 AM, Lee Jones <lee.jones@xxxxxxxxxx> wrote:
>> > On Mon, 27 Apr 2015, Andrew Bresticker wrote:
>> >> Add a binding document for the XUSB host complex on NVIDIA Tegra124
>> >> and later SoCs. The XUSB host complex includes a mailbox for
>> >> communication with the XUSB micro-controller and an xHCI host-controller.
>> >> Signed-off-by: Andrew Bresticker <abrestic@xxxxxxxxxxxx>
>> >> Cc: Rob Herring <robh+dt@xxxxxxxxxx>
>> >> Cc: Pawel Moll <pawel.moll@xxxxxxx>
>> >> Cc: Mark Rutland <mark.rutland@xxxxxxx>
>> >> Cc: Ian Campbell <ijc+devicetree@xxxxxxxxxxxxxx>
>> >> Cc: Kumar Gala <galak@xxxxxxxxxxxxxx>
>> >> Cc: Samuel Ortiz <sameo@xxxxxxxxxxxxxxx>
>> >> Cc: Lee Jones <lee.jones@xxxxxxxxxx>
>> >> ---
>> >> New for v7.
>> >> ---
>> >> .../bindings/mfd/nvidia,tegra124-xusb.txt | 46 ++++++++++++++++++++++
>> >> 1 file changed, 46 insertions(+)
>> >> create mode 100644 Documentation/devicetree/bindings/mfd/nvidia,tegra124-xusb.txt
>> >> diff --git a/Documentation/devicetree/bindings/mfd/nvidia,tegra124-xusb.txt b/Documentation/devicetree/bindings/mfd/nvidia,tegra124-xusb.txt
>> >> new file mode 100644
>> >> index 0000000..6a46680
>> >> --- /dev/null
>> >> +++ b/Documentation/devicetree/bindings/mfd/nvidia,tegra124-xusb.txt
>> >> @@ -0,0 +1,46 @@
>> >> +NVIDIA Tegra XUSB host copmlex
>> >> +==============================
>> >> +
>> >> +The XUSB host complex on Tegra124 and later SoCs contains an xHCI host
>> >> +controller and a mailbox for communication with the XUSB micro-controller.
>> >> +
>> >> +Required properties:
>> >> +--------------------
>> >> + - compatible: For Tegra124, must contain "nvidia,tegra124-xusb".
>> >> + Otherwise, must contain '"nvidia,<chip>-xusb", "nvidia,tegra124-xusb"'
>> >> + where <chip> is tegra132.
>> > Okay. Why?
>> Why what? This is the convention used for Tegra bindings and is also
>> documented in Documentation/devicetree/bindings/submitting-patches.txt.
>> See nvidia,tegra114-spi.txt and nvidia,tegra20-i2c.txt for other
>> examples of this.
> It seems strange to me that you'd mention two specific chips in one
> compatible string. What's the purpose of that?
The Tegra maintainers can correct me if I'm wrong here, but the point
is, I think, to future-proof the binding. There are currently no
differences between Tegra124 and Tegra132 that need to be accounted
for in the driver, so the driver need only match against
"nvidia,tegra124-xusb". If a Tegra132-specific quirk comes about
later all Tegra132 device-trees will also include the
"nvidia,tegra132-*" compatible string, so we can simply update the
driver without breaking DT backwards-compatibility.
>> >> + - reg: Must contain register base and length for each register set listed
>> >> + in reg-names.
>> > You've mentioned 2 of the cells, what about the remaining 2?
>> The example given was for Tegra124, where there are two address cells
>> and two size cells.
> I don't get that. How does that work?
Tegra124 has a physical address space of > 4GB because of LPAE, thus a
single cell each for address and size is not sufficient. The arm64
Tegra SoCs will obviously also use two address and size cells. Take a
look at arch/arm/boot/dts/tegra124.dtsi.
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/