Re: perf: odd event scheduling issue

From: Peter Zijlstra
Date: Wed May 20 2015 - 05:28:56 EST


On Wed, May 20, 2015 at 09:00:57AM +0200, Peter Zijlstra wrote:
> On Tue, May 19, 2015 at 11:07:09PM -0400, Vince Weaver wrote:
> > Hello
> >
> > so I'm running 4.1-rc4 on my Haswell machine and a lot of my perf_event
> > testsuite is failing. There seems to be weird event scheduling issues.
> >
> > I can reproduce it with plain perf; simple event groups that should work
> > fine can't be scheduled.
> >
> > vince@haswell:~$ perf stat -e \{cycles,instructions\} sleep 1
> >
>
> Hmm indeed, my ivb-ep does the same thing. Lemme go poke at that.

I've gotta go pick the kid up from school, but the bisect just finished
and threw up the below commit.

I'll go stare at it in an hour or so.

---

c02cdbf60b51b8d98a49185535f5d527a2965142 is the first bad commit
commit c02cdbf60b51b8d98a49185535f5d527a2965142
Author: Stephane Eranian <eranian@xxxxxxxxxx>
Date: Mon Nov 17 20:07:02 2014 +0100

perf/x86/intel: Limit to half counters when the HT workaround is enabled, to avoid exclusive mode starvation

This patch limits the number of counters available to each CPU when
the HT bug workaround is enabled.

This is necessary to avoid situation of counter starvation. Such can
arise from configuration where one HT thread, HT0, is using all 4 counters
with corrupting events which require exclusion the the sibling HT, HT1.

In such case, HT1 would not be able to schedule any event until HT0
is done. To mitigate this problem, this patch artificially limits
the number of counters to 2.

That way, we can gurantee that at least 2 counters are not in exclusive
mode and therefore allow the sibling thread to schedule events of the
same type (system vs. per-thread). The 2 counters are not determined
in advance. We simply set the limit to two events per HT.

This helps mitigate starvation in case of events with specific counter
constraints such a PREC_DIST.

Note that this does not elimintate the starvation is all cases. But
it is better than not having it.

(Solution suggested by Peter Zjilstra.)

Signed-off-by: Stephane Eranian <eranian@xxxxxxxxxx>
Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
Cc: bp@xxxxxxxxx
Cc: jolsa@xxxxxxxxxx
Cc: kan.liang@xxxxxxxxx
Cc: maria.n.dimakopoulou@xxxxxxxxx
Link: http://lkml.kernel.org/r/1416251225-17721-11-git-send-email-eranian@xxxxxxxxxx
Signed-off-by: Ingo Molnar <mingo@xxxxxxxxxx>

:040000 040000 d78b3927f7fb17a34079012f7184aeef6120e411 84a0237880834d5b58b357fb58ff816124718545 M arch
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