Re: [PATCH] crypto: caam - fix non-64-bit write/read access

From: Victoria Milhoan
Date: Wed Jun 17 2015 - 10:31:26 EST

On Tue, 16 Jun 2015 12:59:07 +0200
Steffen Trumtrar <s.trumtrar@xxxxxxxxxxxxxx> wrote:

> The patch
> crypto: caam - Add definition of rd/wr_reg64 for little endian platform
> added support for little endian platforms to the CAAM driver. Namely a
> write and read function for 64 bit registers.
> The only user of this functions is the Job Ring driver (drivers/crypto/caam/jr.c).
> It uses the functions to set the DMA addresses for the input/output rings.
> However, at least in the default configuration, the least significant 32 bits are
> always in the base+0x0004 address; independent of the endianness of the bytes itself.
> That means the addresses do not change with the system endianness.
> DMA addresses are only 32 bits wide on non-64-bit systems, writing the upper 32 bits
> of this value to the register for the least significant bits results in the DMA address
> being set to 0.
> Fix this by always writing the registers in the same way.
> Suggested-by: Russell King <linux@xxxxxxxxxxxxxxxx>
> Signed-off-by: Steffen Trumtrar <s.trumtrar@xxxxxxxxxxxxxx>
> ---
> This patch is only compile-tested for PowerPC and tested on ARM.
> According to the datasheets for i.MX6 and P1010 this should be correct, though.

I can confirm that this patch works on both QorIQ/PowerPC and ARM devices.

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