Re: [PATCH V7 3/5] arm64: mm: add PROT_DEVICE_nGnRnE and PROT_NORMAL_WT

[Catalin Marinas]

On Tue, Jul 21, 2015 at 10:59:18PM +0100, Jonathan (Zhixiong) Zhang wrote:
> From: "Jonathan (Zhixiong) Zhang" <zjzhang@xxxxxxxxxxxxxx>
> 
> UEFI spec 2.5 section 2.3.6.1 defines that EFI_MEMORY_[UC|WC|WT|WB] are
> possible EFI memory types for AArch64. Each of those EFI memory types
> is mapped to a corresponding AArch64 memory type. So we need to define
> PROT_DEVICE_nGnRnE and PROT_NORMWL_WT.
> 
> MT_NORMAL_WT is defined, and its encoding is added to MAIR_EL1 when
> initializing cpu.
> 
> Change-Id: I20ac71ddf74c17e41769ecbb5f8c60eeefbb398a
> Signed-off-by: Jonathan (Zhixiong) Zhang <zjzhang@xxxxxxxxxxxxxx>

I'll let the EFI guys to comment on whether these are needed, what for
(we could probably live just fine only with Device nGnRE and Normal NC).

>  #define PROT_SECT_DEVICE_nGnRE	(PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE))
> diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
> index 838266f5b056..23e265d732f8 100644
> --- a/arch/arm64/mm/proc.S
> +++ b/arch/arm64/mm/proc.S
> @@ -294,7 +294,7 @@ ENTRY(__cpu_setup)
>  	msr	cpacr_el1, x0			// Enable FP/ASIMD
>  	msr	mdscr_el1, xzr			// Reset mdscr_el1
>  	/*
> -	 * Memory region attributes for LPAE:
> +	 * Memory region attributes for LPAE and EFI:

LPAE refers to the page table format, the comment probably inherited
from arch/arm. EFI means a completely different thing, so please remove
it.

>  	 *
>  	 *   n = AttrIndx[2:0]
>  	 *			n	MAIR
> @@ -303,12 +303,14 @@ ENTRY(__cpu_setup)
>  	 *   DEVICE_GRE		010	00001100
>  	 *   NORMAL_NC		011	01000100
>  	 *   NORMAL		100	11111111
> +	 *   NORMAL_WT		101	10111011

I don't think the write allocation hint makes much sense for WT memory
(though it shouldn't cause issues either). Just use 10101010.

-- 
Catalin

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