From: David Daney <ddaney@xxxxxxxxxxxxxxxxxx>
Date: Thu, 24 Sep 2015 15:04:23 -0700
On 09/24/2015 02:52 PM, David Miller wrote:
From: David Daney <ddaney.cavm@xxxxxxxxx>
Date: Tue, 22 Sep 2015 17:41:36 -0700
From: David Daney <david.daney@xxxxxxxxxx>
When the Cavium mdio-octeon devices appear in the Thunder family of
arm64 based SoCs, they show up as PCI devices. Add PCI driver
wrapping so the driver is bound in the standard PCI device scan.
When in this form, a single PCI device may have more than a single
bus, we call this a "nexus" of buses. The standard firmware
device_for_each_child_node() iterator is used to find the individual
buses underneath the "nexus".
Update the device tree binding documentation for the new PCI driver
Signed-off-by: David Daney <david.daney@xxxxxxxxxx>
This patch breaks the build:
For which architecture?
I tested it on mips and arm64. I will try x86, as I guess that is
where you tried your test build.
There is, somewhat of, a method behind the madness here.
In order to use MSI-X interrupts, we need a corresponding PCI
device. Now, this driver doesn't currently use interrupts, but other
devices in the SoC do, so they must be PCI devices.
"I need this thing, which isn't needed, therefore I'm making this
Sorry, that's not a good argument.
ACPI nodes have names and whatnot as well.
So I haven't heard a compelling argument so far.
So why not just implement this cleanly and using the existing
framework now, and then when you have a legitimate reason for making a
major change to the probing scheme you can do it then.