Re: [PATCH 1/4] x86, perf: Use a new PMU ack sequence on Skylake

[Ingo Molnar]

* Peter Zijlstra <peterz@xxxxxxxxxxxxx> wrote:

> On Fri, Oct 16, 2015 at 06:35:14AM -0700, Andi Kleen wrote:
> > > > In principle the sequence should work on other CPUs too, but
> > > > since I only tested on Skylake it is only enabled there.
> > > 
> > > I would very much like a reduction of the ack states. You introduced the 
> > > late thing, which should also work for everyone, and now you introduce yet 
> > > another variant.
> > 
> > Ingo suggested to do it this way. Originally I thought it wasn't needed, but I 
> > think now that late-ack made some of the races that eventually caused Skylake 
> > LBR to fall over worse. So in hindsight it was a good idea to not use it 
> > everywhere.
> > 
> > > I would very much prefer a single ack scheme if at all possible.
> > 
> > Could enable it everywhere, but then users would need to test it on most types 
> > of CPUs, as I can't.
> 
> I think Mike still has a Core2 machine (and I might be able to dig out a 
> laptop), Ingo should have a NHM(-EP), I have SNB, IVB-EP, HSW. So if you could 
> test at least BDW and SKL we might have decent test coverage.
> 
> Ingo, do you want to first merge the safe patch and then clean up?

Yeah, would be nice to structure it that way, out of general paranoia.

Thanks,

	Ingo
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