[PATCH 3.19.y-ckt 55/86] spi: xtensa-xtfpga: fix register endianness

From: Kamal Mostafa
Date: Tue Oct 27 2015 - 17:51:46 EST

3.19.8-ckt9 -stable review patch. If anyone has any objections, please let me know.


From: Max Filippov <jcmvbkbc@xxxxxxxxx>

commit b0b4855099e301c8603ea37da9a0103a96c2e0b1 upstream.

XTFPGA SPI controller has native endian registers.
Fix register acessors so that they work in big-endian configurations.

Signed-off-by: Max Filippov <jcmvbkbc@xxxxxxxxx>
Signed-off-by: Mark Brown <broonie@xxxxxxxxxx>
Signed-off-by: Kamal Mostafa <kamal@xxxxxxxxxxxxx>
drivers/spi/spi-xtensa-xtfpga.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/spi-xtensa-xtfpga.c b/drivers/spi/spi-xtensa-xtfpga.c
index 2e32ea2..be6155c 100644
--- a/drivers/spi/spi-xtensa-xtfpga.c
+++ b/drivers/spi/spi-xtensa-xtfpga.c
@@ -34,13 +34,13 @@ struct xtfpga_spi {
static inline void xtfpga_spi_write32(const struct xtfpga_spi *spi,
unsigned addr, u32 val)
- iowrite32(val, spi->regs + addr);
+ __raw_writel(val, spi->regs + addr);

static inline unsigned int xtfpga_spi_read32(const struct xtfpga_spi *spi,
unsigned addr)
- return ioread32(spi->regs + addr);
+ return __raw_readl(spi->regs + addr);

static inline void xtfpga_spi_wait_busy(struct xtfpga_spi *xspi)

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