Re: [PATCH v7 11/17] Documentation: phy: add document for rockchip dp phy

From: Yakir Yang
Date: Tue Oct 27 2015 - 22:27:29 EST

On 10/28/2015 07:08 AM, Heiko Stuebner wrote:
Am Samstag, 24. Oktober 2015, 11:06:37 schrieb Yakir Yang:
Add dt binding documentation for rockchip display port PHY.

Tested-by: Javier Martinez Canillas <javier@xxxxxxxxxxxxxxx>
Signed-off-by: Yakir Yang <ykk@xxxxxxxxxxxxxx>
Changes in v7: None
Changes in v6: None
Changes in v5:
- Split binding doc's from driver changes. (Rob)
- Update the rockchip,grf explain in document, and correct the clock required
elemets in document. (Rob & Heiko)

Changes in v4: None
Changes in v3: None
Changes in v2: None

.../devicetree/bindings/phy/rockchip-dp-phy.txt | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt

diff --git a/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt
new file mode 100644
index 0000000..505194e
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt
@@ -0,0 +1,22 @@
+Rockchip Soc Seroes Display Port PHY
+Required properties:
+- compatible : should be one of the following supported values:
+ - "rockchip.rk3288-dp-phy"
+- clocks: from common clock binding: handle to dp clock.
+ of memory mapped region.
+- clock-names: from common clock binding:
+ Required elements: "24m"
+- rockchip,grf: phandle to the syscon managing the "general register files"
+- #phy-cells : from the generic PHY bindings, must be 0;
+edp_phy: edp-phy@ff770274 {
one small thing, I found while playing more ... the node should not have
an address, as it also does not have register property. So just name it
edp_phy: edp-phy {

There is only one anyway on the rk3288.

With that change the Reviewed-by still applies :-)


- Yakir

+ compatible = "rockchip,rk3288-dp-phy";
+ rockchip,grf = <&grf>;
+ clocks = <&cru SCLK_EDP_24M>;
+ clock-names = "24m";
+ #phy-cells = <0>;

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