[PATCH] Fixed the coding style according to `checkpath.pl'
From: Egor Uleyskiy
Date: Sat Oct 31 2015 - 18:08:39 EST
From: Egor Uleyskiy <egor.ulieiskii@xxxxxxxxx>
Signed-off-by: Egor Uleyskiy <egor.ulieiskii@xxxxxxxxx>
---
drivers/staging/vme/devices/vme_pio2.h | 87 ++++++++++++++---------------
drivers/staging/vme/devices/vme_pio2_cntr.c | 2 +-
drivers/staging/vme/devices/vme_pio2_core.c | 20 +++----
drivers/staging/vme/devices/vme_pio2_gpio.c | 32 +++++------
drivers/staging/vme/devices/vme_user.h | 2 -
5 files changed, 68 insertions(+), 75 deletions(-)
diff --git a/drivers/staging/vme/devices/vme_pio2.h b/drivers/staging/vme/devices/vme_pio2.h
index d5d94c4..c911952 100644
--- a/drivers/staging/vme/devices/vme_pio2.h
+++ b/drivers/staging/vme/devices/vme_pio2.h
@@ -1,6 +1,8 @@
#ifndef _VME_PIO2_H_
#define _VME_PIO2_H_
+#include <linux/bitops.h>
+
#define PIO2_CARDS_MAX 32
#define PIO2_VARIANT_LENGTH 5
@@ -48,8 +50,6 @@ static const int PIO2_REGS_INT_MASK[8] = { PIO2_REGS_INT_MASK0,
PIO2_REGS_INT_MASK6,
PIO2_REGS_INT_MASK7 };
-
-
#define PIO2_REGS_CTRL 0x18
#define PIO2_REGS_VME_VECTOR 0x19
#define PIO2_REGS_CNTR0 0x20
@@ -63,7 +63,6 @@ static const int PIO2_REGS_INT_MASK[8] = { PIO2_REGS_INT_MASK0,
#define PIO2_REGS_ID 0x30
-
/* PIO2_REGS_DATAx (0x0 - 0x3) */
static const int PIO2_CHANNEL_BANK[32] = { 0, 0, 0, 0, 0, 0, 0, 0,
@@ -71,38 +70,38 @@ static const int PIO2_CHANNEL_BANK[32] = { 0, 0, 0, 0, 0, 0, 0, 0,
2, 2, 2, 2, 2, 2, 2, 2,
3, 3, 3, 3, 3, 3, 3, 3 };
-#define PIO2_CHANNEL0_BIT (1 << 0)
-#define PIO2_CHANNEL1_BIT (1 << 1)
-#define PIO2_CHANNEL2_BIT (1 << 2)
-#define PIO2_CHANNEL3_BIT (1 << 3)
-#define PIO2_CHANNEL4_BIT (1 << 4)
-#define PIO2_CHANNEL5_BIT (1 << 5)
-#define PIO2_CHANNEL6_BIT (1 << 6)
-#define PIO2_CHANNEL7_BIT (1 << 7)
-#define PIO2_CHANNEL8_BIT (1 << 0)
-#define PIO2_CHANNEL9_BIT (1 << 1)
-#define PIO2_CHANNEL10_BIT (1 << 2)
-#define PIO2_CHANNEL11_BIT (1 << 3)
-#define PIO2_CHANNEL12_BIT (1 << 4)
-#define PIO2_CHANNEL13_BIT (1 << 5)
-#define PIO2_CHANNEL14_BIT (1 << 6)
-#define PIO2_CHANNEL15_BIT (1 << 7)
-#define PIO2_CHANNEL16_BIT (1 << 0)
-#define PIO2_CHANNEL17_BIT (1 << 1)
-#define PIO2_CHANNEL18_BIT (1 << 2)
-#define PIO2_CHANNEL19_BIT (1 << 3)
-#define PIO2_CHANNEL20_BIT (1 << 4)
-#define PIO2_CHANNEL21_BIT (1 << 5)
-#define PIO2_CHANNEL22_BIT (1 << 6)
-#define PIO2_CHANNEL23_BIT (1 << 7)
-#define PIO2_CHANNEL24_BIT (1 << 0)
-#define PIO2_CHANNEL25_BIT (1 << 1)
-#define PIO2_CHANNEL26_BIT (1 << 2)
-#define PIO2_CHANNEL27_BIT (1 << 3)
-#define PIO2_CHANNEL28_BIT (1 << 4)
-#define PIO2_CHANNEL29_BIT (1 << 5)
-#define PIO2_CHANNEL30_BIT (1 << 6)
-#define PIO2_CHANNEL31_BIT (1 << 7)
+#define PIO2_CHANNEL0_BIT BIT(0)
+#define PIO2_CHANNEL1_BIT BIT(1)
+#define PIO2_CHANNEL2_BIT BIT(2)
+#define PIO2_CHANNEL3_BIT BIT(3)
+#define PIO2_CHANNEL4_BIT BIT(4)
+#define PIO2_CHANNEL5_BIT BIT(5)
+#define PIO2_CHANNEL6_BIT BIT(6)
+#define PIO2_CHANNEL7_BIT BIT(7)
+#define PIO2_CHANNEL8_BIT BIT(0)
+#define PIO2_CHANNEL9_BIT BIT(1)
+#define PIO2_CHANNEL10_BIT BIT(2)
+#define PIO2_CHANNEL11_BIT BIT(3)
+#define PIO2_CHANNEL12_BIT BIT(4)
+#define PIO2_CHANNEL13_BIT BIT(5)
+#define PIO2_CHANNEL14_BIT BIT(6)
+#define PIO2_CHANNEL15_BIT BIT(7)
+#define PIO2_CHANNEL16_BIT BIT(0)
+#define PIO2_CHANNEL17_BIT BIT(1)
+#define PIO2_CHANNEL18_BIT BIT(2)
+#define PIO2_CHANNEL19_BIT BIT(3)
+#define PIO2_CHANNEL20_BIT BIT(4)
+#define PIO2_CHANNEL21_BIT BIT(5)
+#define PIO2_CHANNEL22_BIT BIT(6)
+#define PIO2_CHANNEL23_BIT BIT(7)
+#define PIO2_CHANNEL24_BIT BIT(0)
+#define PIO2_CHANNEL25_BIT BIT(1)
+#define PIO2_CHANNEL26_BIT BIT(2)
+#define PIO2_CHANNEL27_BIT BIT(3)
+#define PIO2_CHANNEL28_BIT BIT(4)
+#define PIO2_CHANNEL29_BIT BIT(5)
+#define PIO2_CHANNEL30_BIT BIT(6)
+#define PIO2_CHANNEL31_BIT BIT(7)
static const int PIO2_CHANNEL_BIT[32] = { PIO2_CHANNEL0_BIT, PIO2_CHANNEL1_BIT,
PIO2_CHANNEL2_BIT, PIO2_CHANNEL3_BIT,
@@ -123,12 +122,12 @@ static const int PIO2_CHANNEL_BIT[32] = { PIO2_CHANNEL0_BIT, PIO2_CHANNEL1_BIT,
};
/* PIO2_REGS_INT_STAT_CNTR (0xc) */
-#define PIO2_COUNTER0 (1 << 0)
-#define PIO2_COUNTER1 (1 << 1)
-#define PIO2_COUNTER2 (1 << 2)
-#define PIO2_COUNTER3 (1 << 3)
-#define PIO2_COUNTER4 (1 << 4)
-#define PIO2_COUNTER5 (1 << 5)
+#define PIO2_COUNTER0 BIT(0)
+#define PIO2_COUNTER1 BIT(1)
+#define PIO2_COUNTER2 BIT(2)
+#define PIO2_COUNTER3 BIT(3)
+#define PIO2_COUNTER4 BIT(4)
+#define PIO2_COUNTER5 BIT(5)
static const int PIO2_COUNTER[6] = { PIO2_COUNTER0, PIO2_COUNTER1,
PIO2_COUNTER2, PIO2_COUNTER3,
@@ -136,8 +135,8 @@ static const int PIO2_COUNTER[6] = { PIO2_COUNTER0, PIO2_COUNTER1,
/* PIO2_REGS_CTRL (0x18) */
#define PIO2_VME_INT_MASK 0x7
-#define PIO2_LED (1 << 6)
-#define PIO2_LOOP (1 << 7)
+#define PIO2_LED BIT(6)
+#define PIO2_LOOP BIT(7)
/* PIO2_REGS_VME_VECTOR (0x19) */
#define PIO2_VME_VECTOR_SPUR 0x0
@@ -204,8 +203,6 @@ static const int PIO2_CNTR_SC_DEV[6] = { PIO2_CNTR_SC_DEV0, PIO2_CNTR_SC_DEV1,
#define PIO2_CNTR_BCD 1
-
-
enum pio2_bank_config { NOFIT, INPUT, OUTPUT, BOTH };
enum pio2_int_config { NONE = 0, LOW2HIGH = 1, HIGH2LOW = 2, EITHER = 4 };
diff --git a/drivers/staging/vme/devices/vme_pio2_cntr.c b/drivers/staging/vme/devices/vme_pio2_cntr.c
index 6335471..486c30c 100644
--- a/drivers/staging/vme/devices/vme_pio2_cntr.c
+++ b/drivers/staging/vme/devices/vme_pio2_cntr.c
@@ -61,7 +61,7 @@ int pio2_cntr_reset(struct pio2_card *card)
/* Ensure all counter interrupts are cleared */
do {
retval = vme_master_read(card->window, ®, 1,
- PIO2_REGS_INT_STAT_CNTR);
+ PIO2_REGS_INT_STAT_CNTR);
if (retval < 0)
return retval;
} while (reg != 0);
diff --git a/drivers/staging/vme/devices/vme_pio2_core.c b/drivers/staging/vme/devices/vme_pio2_core.c
index 35c6ce5..28a6ab6 100644
--- a/drivers/staging/vme/devices/vme_pio2_core.c
+++ b/drivers/staging/vme/devices/vme_pio2_core.c
@@ -90,7 +90,7 @@ static void pio2_int(int level, int vector, void *ptr)
case 4:
/* Channels 0 to 7 */
retval = vme_master_read(card->window, ®, 1,
- PIO2_REGS_INT_STAT[vec - 1]);
+ PIO2_REGS_INT_STAT[vec - 1]);
if (retval < 0) {
dev_err(&card->vdev->dev,
"Unable to read IRQ status register\n");
@@ -100,8 +100,8 @@ static void pio2_int(int level, int vector, void *ptr)
channel = ((vec - 1) * 8) + i;
if (reg & PIO2_CHANNEL_BIT[channel])
dev_info(&card->vdev->dev,
- "Interrupt on I/O channel %d\n",
- channel);
+ "Interrupt on I/O channel %d\n",
+ channel);
}
break;
case 5:
@@ -215,7 +215,7 @@ static int pio2_probe(struct vme_dev *vdev)
u8 reg;
int vec;
- card = kzalloc(sizeof(struct pio2_card), GFP_KERNEL);
+ card = kzalloc(sizeof(*card), GFP_KERNEL);
if (!card) {
retval = -ENOMEM;
goto err_struct;
@@ -289,7 +289,7 @@ static int pio2_probe(struct vme_dev *vdev)
}
retval = vme_master_set(card->window, 1, card->base, 0x10000, VME_A24,
- (VME_SCT | VME_USER | VME_DATA), VME_D16);
+ (VME_SCT | VME_USER | VME_DATA), VME_D16);
if (retval) {
dev_err(&card->vdev->dev,
"Unable to configure VME master resource\n");
@@ -335,7 +335,7 @@ static int pio2_probe(struct vme_dev *vdev)
/* Set VME vector */
retval = vme_master_write(card->window, &card->irq_vector, 1,
- PIO2_REGS_VME_VECTOR);
+ PIO2_REGS_VME_VECTOR);
if (retval < 0)
return retval;
@@ -343,7 +343,7 @@ static int pio2_probe(struct vme_dev *vdev)
vec = card->irq_vector | PIO2_VME_VECTOR_SPUR;
retval = vme_irq_request(vdev, card->irq_level, vec,
- &pio2_int, (void *)card);
+ &pio2_int, (void *)card);
if (retval < 0) {
dev_err(&card->vdev->dev,
"Unable to attach VME interrupt vector0x%x, level 0x%x\n",
@@ -356,7 +356,7 @@ static int pio2_probe(struct vme_dev *vdev)
vec = card->irq_vector | PIO2_VECTOR_BANK[i];
retval = vme_irq_request(vdev, card->irq_level, vec,
- &pio2_int, (void *)card);
+ &pio2_int, (void *)card);
if (retval < 0) {
dev_err(&card->vdev->dev,
"Unable to attach VME interrupt vector0x%x, level 0x%x\n",
@@ -370,7 +370,7 @@ static int pio2_probe(struct vme_dev *vdev)
vec = card->irq_vector | PIO2_VECTOR_CNTR[i];
retval = vme_irq_request(vdev, card->irq_level, vec,
- &pio2_int, (void *)card);
+ &pio2_int, (void *)card);
if (retval < 0) {
dev_err(&card->vdev->dev,
"Unable to attach VME interrupt vector0x%x, level 0x%x\n",
@@ -397,7 +397,7 @@ static int pio2_probe(struct vme_dev *vdev)
dev_set_drvdata(&card->vdev->dev, card);
dev_info(&card->vdev->dev,
- "PIO2 (variant %s) configured at 0x%lx\n", card->variant,
+ "PIO2 (variant %s) configured at 0x%lx\n", card->variant,
card->base);
return 0;
diff --git a/drivers/staging/vme/devices/vme_pio2_gpio.c b/drivers/staging/vme/devices/vme_pio2_gpio.c
index 77901b3..d441ff2 100644
--- a/drivers/staging/vme/devices/vme_pio2_gpio.c
+++ b/drivers/staging/vme/devices/vme_pio2_gpio.c
@@ -37,14 +37,13 @@ static int pio2_gpio_get(struct gpio_chip *chip, unsigned int offset)
struct pio2_card *card = gpio_to_pio2_card(chip);
if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == OUTPUT) |
- (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) {
-
+ (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) {
dev_err(&card->vdev->dev, "Channel not available as input\n");
return 0;
}
retval = vme_master_read(card->window, ®, 1,
- PIO2_REGS_DATA[PIO2_CHANNEL_BANK[offset]]);
+ PIO2_REGS_DATA[PIO2_CHANNEL_BANK[offset]]);
if (retval < 0) {
dev_err(&card->vdev->dev, "Unable to read from GPIO\n");
return 0;
@@ -67,29 +66,28 @@ static int pio2_gpio_get(struct gpio_chip *chip, unsigned int offset)
return 0;
}
-static void pio2_gpio_set(struct gpio_chip *chip, unsigned int offset,
- int value)
+static void pio2_gpio_set(struct gpio_chip *chip,
+ unsigned int offset, int value)
{
u8 reg;
int retval;
struct pio2_card *card = gpio_to_pio2_card(chip);
if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == INPUT) |
- (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) {
-
+ (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) {
dev_err(&card->vdev->dev, "Channel not available as output\n");
return;
}
if (value)
reg = card->bank[PIO2_CHANNEL_BANK[offset]].value |
- PIO2_CHANNEL_BIT[offset];
+ PIO2_CHANNEL_BIT[offset];
else
reg = card->bank[PIO2_CHANNEL_BANK[offset]].value &
- ~PIO2_CHANNEL_BIT[offset];
+ ~PIO2_CHANNEL_BIT[offset];
retval = vme_master_write(card->window, ®, 1,
- PIO2_REGS_DATA[PIO2_CHANNEL_BANK[offset]]);
+ PIO2_REGS_DATA[PIO2_CHANNEL_BANK[offset]]);
if (retval < 0) {
dev_err(&card->vdev->dev, "Unable to write to GPIO\n");
return;
@@ -150,7 +148,7 @@ int pio2_gpio_reset(struct pio2_card *card)
/* Zero output registers */
for (i = 0; i < 4; i++) {
retval = vme_master_write(card->window, &data, 1,
- PIO2_REGS_DATA[i]);
+ PIO2_REGS_DATA[i]);
if (retval < 0)
return retval;
card->bank[i].value = 0;
@@ -159,12 +157,12 @@ int pio2_gpio_reset(struct pio2_card *card)
/* Set input interrupt masks */
for (i = 0; i < 4; i++) {
retval = vme_master_write(card->window, &data, 1,
- PIO2_REGS_INT_MASK[i * 2]);
+ PIO2_REGS_INT_MASK[i * 2]);
if (retval < 0)
return retval;
retval = vme_master_write(card->window, &data, 1,
- PIO2_REGS_INT_MASK[(i * 2) + 1]);
+ PIO2_REGS_INT_MASK[(i * 2) + 1]);
if (retval < 0)
return retval;
@@ -176,7 +174,7 @@ int pio2_gpio_reset(struct pio2_card *card)
for (i = 0; i < 4; i++) {
do {
retval = vme_master_read(card->window, &data, 1,
- PIO2_REGS_INT_STAT[i]);
+ PIO2_REGS_INT_STAT[i]);
if (retval < 0)
return retval;
} while (data != 0);
@@ -192,7 +190,7 @@ int pio2_gpio_init(struct pio2_card *card)
label = kasprintf(GFP_KERNEL,
"%s@%s", driver_name, dev_name(&card->vdev->dev));
- if (label == NULL)
+ if (!label)
return -ENOMEM;
card->gc.label = label;
@@ -207,7 +205,7 @@ int pio2_gpio_init(struct pio2_card *card)
card->gc.set = pio2_gpio_set;
/* This function adds a memory mapped GPIO chip */
- retval = gpiochip_add(&(card->gc));
+ retval = gpiochip_add(&card->gc);
if (retval) {
dev_err(&card->vdev->dev, "Unable to register GPIO\n");
kfree(card->gc.label);
@@ -220,7 +218,7 @@ void pio2_gpio_exit(struct pio2_card *card)
{
const char *label = card->gc.label;
- gpiochip_remove(&(card->gc));
+ gpiochip_remove(&card->gc);
kfree(label);
}
diff --git a/drivers/staging/vme/devices/vme_user.h b/drivers/staging/vme/devices/vme_user.h
index b8cc7bc..a6cb756 100644
--- a/drivers/staging/vme/devices/vme_user.h
+++ b/drivers/staging/vme/devices/vme_user.h
@@ -20,7 +20,6 @@ struct vme_master {
#endif
} __packed;
-
/*
* IOCTL Commands and structures
*/
@@ -28,7 +27,6 @@ struct vme_master {
/* Magic number for use in ioctls */
#define VME_IOC_MAGIC 0xAE
-
/* VMEbus Slave Window Configuration Structure */
struct vme_slave {
__u32 enable; /* State of Window */
--
2.5.0
--
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