Re: [PATCH 3/5] x86/mcheck/AMD: Reduce number of blocks scanned per bank
From: Aravind Gopalakrishnan
Date: Thu Jan 14 2016 - 17:48:37 EST
On 1/14/2016 4:37 PM, Borislav Petkov wrote:
On Thu, Jan 14, 2016 at 04:05:38PM -0600, Aravind Gopalakrishnan wrote:
-#define NR_BLOCKS 9
This doesn't look necessary to me. We do check MCi_MISC[BlkPtr] before
+#define NR_BLOCKS 5
accessing that MSR.
True. But that BlkPtr logic also will undergo changes as it's
interpretation for future processors is different.
We are guaranteed to have all the MISC registers (all 5 of them) going
But we shouldn't be accessing MSRs beyond the 5th extended MISC register
for each bank as that is the architectural boundary.
Hence the change here.