[PATCH V2 3/5] x86/mcheck/AMD: Reduce number of blocks scanned per bank

From: Aravind Gopalakrishnan
Date: Fri Jan 15 2016 - 18:42:57 EST

>From Fam17h onwards, the number of extended MISC register
blocks is reduced to 4. It is an architectural change
from what we had on earlier processors.

Changing the value of NRBLOCKS here to reflect that change.

Although theoritically the total number of extended MCx_MISC
registers was 8 in earlier processor families, in practice
we only had to use the extra registers for MC4. And only 2 of
those were used. So this change does not affect older processors.
Tested it on Fam10h, Fam15h systems and works fine.

Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@xxxxxxx>
arch/x86/kernel/cpu/mcheck/mce_amd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index da570a8..e650fdc 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -28,7 +28,7 @@
#include <asm/msr.h>
#include <asm/trace/irq_vectors.h>

-#define NR_BLOCKS 9
+#define NR_BLOCKS 5
#define INT_TYPE_APIC 0x00020000
#define MASK_VALID_HI 0x80000000