Re: [PATCH v15 0/6] altera fpga area and fpga bus

From: Moritz Fischer
Date: Thu Jan 21 2016 - 04:48:41 EST

Hi Alan,

On Wed, Jan 20, 2016 at 8:24 PM, <atull@xxxxxxxxxxxxxxxxxxxxx> wrote:
> From: Alan Tull <atull@xxxxxxxxxxxxxxxxxxxxx>
> For v15, I'm not using the FPGA Manager as the bus. I'm adding a FPGA Bus;
> the FPGA Manager and bridges go below it.
> I've gotten enough feedback that my proposals are Altera specific that I am
> going with that and changing the bindings to include an 'altr,' prefix.

I hope this wasn't a misunderstanding of one of my earlier remarks. I
think the fpga-area & fpga bus
parts do apply to to Xilinx FPGAs, too. I think for fpga-area and
fpga-bus we could drop the 'altr' prefix.

> I've combined the bindings document and the other Documentation/fpga/ document
> and done a rewrite there.

Looks great!

I'll test it on hardware and look at the patches individually,