Re: virtio ring layout changes for optimal single-stream performance

From: Cornelia Huck
Date: Thu Jan 21 2016 - 10:38:49 EST

On Thu, 21 Jan 2016 15:39:26 +0200
"Michael S. Tsirkin" <mst@xxxxxxxxxx> wrote:

> Hi all!
> I have been experimenting with alternative virtio ring layouts,
> in order to speed up single stream performance.
> I have just posted a benchmark I wrote for the purpose, and a (partial)
> alternative layout implementation. This achieves 20-40% reduction in
> virtio overhead in the (default) polling mode.
> The layout is trying to be as simple as possible, to reduce
> the number of cache lines bouncing between CPUs.

Some kind of diagram or textual description would really help to review

> For benchmarking, the idea is to emulate virtio in user-space,
> artificially adding overhead for e.g. signalling to match what happens
> in case of a VM.

Hm... is this overhead comparable enough between different platform so
that you can get a halfway realistic scenario? What about things like
endianness conversions?

> I'd be very curious to get feedback on this, in particular, some people
> discussed using vectored operations to format virtio ring - would it
> conflict with this work?
> You are all welcome to post enhancements or more layout alternatives as
> patches.

Let me see if I can find time to experiment a bit.