Re: [PATCH 6/7] [PATCH] MIPS: OCTEON: Add support for OCTEON III interrupt controller.

[Rob Herring]

On Thu, Feb 04, 2016 at 04:42:53PM -0800, David Daney wrote:
> From: David Daney <david.daney@xxxxxxxxxx>
> 
> Add irq_chip support for both IPI and "normal" interrupts of the CIU3
> controller.  Document the device tree binding for the CIU3.
> 
> Signed-off-by: David Daney <david.daney@xxxxxxxxxx>
> Cc: Rob Herring <robh+dt@xxxxxxxxxx>
> Cc: Pawel Moll <pawel.moll@xxxxxxx>
> Cc: Mark Rutland <mark.rutland@xxxxxxx>
> Cc: Ian Campbell <ijc+devicetree@xxxxxxxxxxxxxx>
> Cc: Kumar Gala <galak@xxxxxxxxxxxxxx>
> Cc: devicetree@xxxxxxxxxxxxxxx
> Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
> ---
>  .../devicetree/bindings/mips/cavium/ciu3.txt       |  27 +

Acked-by: Rob Herring <robh@xxxxxxxxxx>

>  arch/mips/cavium-octeon/octeon-irq.c               | 651 ++++++++++++++++++++-
>  arch/mips/include/asm/octeon/octeon.h              |   2 +
>  3 files changed, 679 insertions(+), 1 deletion(-)
>  create mode 100644 Documentation/devicetree/bindings/mips/cavium/ciu3.txt