Re: commit 271e1b86e691 is breaking DMA uart on SoCFPGA

From: Caesar Wang
Date: Wed Feb 24 2016 - 19:30:09 EST

å 2016å02æ24æ 21:24, Bartlomiej Zolnierkiewicz åé:

On Wednesday, February 24, 2016 02:01:59 PM Caesar Wang wrote:

Thanks Dinh & Alexander for the intergration testing.



Can you test it again with the patch[0]?

This fixes the problem for me (tested on Samsung Exynos4412 SoC
based Trats2 board).

You may add:

Tested-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@xxxxxxxxxxx>

Thanks Bartlomiej for sharing the test result.:-)


to your patch.

Best regards,
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics

å 2016å02æ23æ 23:14, Dinh Nguyen åé:

Sorry that I couldn't get to this sooner.

On 02/18/2016 10:07 AM, Alexander Kochetkov wrote:

Bartlomiej, could you please tell what uart driver is used on Samsung
Dinh, could you please tell what uart driver is used on SoCFPGA?

SoCFPGA is using the 8250_dw.c uart driver.

Could you make two test?

1) Checkout tree at commit 848e9776fee4 "dmaengine: pl330: support
burst mode for
dev-to-mem and mem-to-dev transmit", make it buildable and see is it
works. In order to make in buildable remove bursts argument from the

if (*bursts == 1)
- return _bursts(pl330, dry_run, buf, pxs, 1);
+ return _bursts(dry_run, buf, pxs, 1);

This case still fails for me.

2) Checkout next-20160211 kernel tree and set src_maxburst and
dst_maxburst to 1 inside UART driver to see is it works?

This case works and the UART is able to operate in DMA mode.