Re: [PATCH] KVM: x86: disable PEBS before a guest entry

[Radim KrÄmÃÅ]

2016-03-03 13:32-0800, David Matlack:
> On Thu, Mar 3, 2016 at 10:53 AM, Radim KrÄmÃÅ <rkrcmar@xxxxxxxxxx> wrote:
>> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
>> @@ -1767,6 +1767,13 @@ static void clear_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr)
>>                         return;
>>                 }
>>                 break;
>> +       case MSR_IA32_PEBS_ENABLE:
>> +               /* PEBS needs a quiescent period after being disabled (to write
>> +                * a record).  Disabling PEBS through VMX MSR swapping doesn't
>> +                * provide that period, so a CPU could write host's record into
>> +                * guest's memory.
>> +                */
>> +               wrmsrl(MSR_IA32_PEBS_ENABLE, 0);
> 
> Should this go in add_atomic_switch_msr instead of clear_atomic_switch_msr?

Yes, it could be cleared in both (in case guest PEBS can be non-zero),
but I wanted to have it only in add_atomic_switch_msr().

Thank you!

v2 underway.

(In case it makes you wonder how it was tested:
 I have a bad habit of trying whether a patch can be improved before
 posting and this one went awry, because I already returned the machine
 with reproducer and the change seemed simple enough.)