Re: [PATCHv3 6/9] Documentation: dt: socfpga: Add Altera Arria10 L2 cache binding
From: Rob Herring
Date: Wed Mar 23 2016 - 10:24:12 EST
On Mon, Mar 21, 2016 at 11:01:43AM -0500, tthayer@xxxxxxxxxxxxxxxxxxxxx wrote:
> From: Thor Thayer <tthayer@xxxxxxxxxxxxxxxxxxxxx>
> Add the device tree bindings needed to support the Altera L2
> cache on the Arria10 chip. Since all the peripherals share
> IRQs, the IRQ fields are now in the ecc_manager.
> Signed-off-by: Thor Thayer <tthayer@xxxxxxxxxxxxxxxxxxxxx>
> v2 Correct spelling of Arria10 in patch title.
> v3 Major restructuring change for ecc_manager to include IRQs
> .../bindings/arm/altera/socfpga-eccmgr.txt | 40 ++++++++++++++++++++
> 1 file changed, 40 insertions(+)
Acked-by: Rob Herring <robh@xxxxxxxxxx>