Re: [PATCH 1/2] clk: tegra: Fix pllre Tegra210 and add pll_re_out1

[Thierry Reding]

On Mon, Mar 21, 2016 at 03:58:52PM -0400, Rhyland Klein wrote:
> Use a new Tegra210 version of the pll_register_pllre function to
> allow setting the proper settings for the m and n div fields.
> 
> Additionally define PLL_RE_OUT1 on Tegra210.

It'd be nice to specify what that additional clock is used for. No need
to repost for that, I can add it when applying.

Thierry

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