Re: Regarding AHCI_MAX_SG and (ATA_HORKAGE_MAX_SEC_1024)

[David Milburn]

On 08/10/2016 12:19 PM, Tom Yan wrote:
> On 10 August 2016 at 15:41, David Milburn <dmilburn@xxxxxxxxxx> wrote:
> > Hi,
> >
> > The 168 makes AHCI_CMD_TBL_SZ equal to 2816
> >
> > AHCI_CMD_TBL_SZ = AHCI_CMD_TBL_HDR_SZ + (AHCI_MAX_SG * 16)
> > AHCI_CMD_TBL_SZ = 128 + (168 * 16)
> >
> > I think if you add in AHCI_CMD_SLOT_SZ (1024) and AHCI_RX_FIS_SZ (256)
> > the DMA is 4K aligned, I think that is where the 168 came from.
>
> Looks like the right guess. Though AHCI_PORT_PRIV_DMA_SZ is not:
>
> AHCI_CMD_SLOT_SZ (1024) + AHCI_CMD_TBL_SZ (2816) + AHCI_RX_FIS_SZ (256) = 4096
>
> but:
>
> AHCI_CMD_SLOT_SZ (1024) + AHCI_CMD_TBL_AR_SZ (2816 * 32 = 90112) +
> AHCI_RX_FIS_SZ (256) = 91392
>
> and AHCI_PORT_PRIV_FBS_DMA_SZ is:
>
> AHCI_CMD_SLOT_SZ (1024) + AHCI_CMD_TBL_AR_SZ (2816 * 32 = 90112) +
> AHCI_RX_FIS_SZ * 16 (4096) = 95232

Yes, but in both cases mem_dma gets adjusted for AHCI_CMD_SLOT_SZ (1024)
and rx_fis_sz (256 or 4096 in fbs case).

Thanks,
David