[tip:x86/cache] x86/intel_rdt: Add CONFIG, Makefile, and basic initialization

From: tip-bot for Fenghua Yu
Date: Wed Oct 26 2016 - 17:29:34 EST


Commit-ID: 78e99b4a2b9afb1c304259fcd4a1c71ca97e3acd
Gitweb: http://git.kernel.org/tip/78e99b4a2b9afb1c304259fcd4a1c71ca97e3acd
Author: Fenghua Yu <fenghua.yu@xxxxxxxxx>
AuthorDate: Sat, 22 Oct 2016 06:19:53 -0700
Committer: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
CommitDate: Wed, 26 Oct 2016 23:12:38 +0200

x86/intel_rdt: Add CONFIG, Makefile, and basic initialization

Introduce CONFIG_INTEL_RDT_A (default: no, dependent on CPU_SUP_INTEL) to
control inclusion of Resource Director Technology in the build.

Simple init() routine just checks which features are present. If they are
pr_info() one line summary for each feature for now.

Signed-off-by: Fenghua Yu <fenghua.yu@xxxxxxxxx>
Cc: "Ravi V Shankar" <ravi.v.shankar@xxxxxxxxx>
Cc: "Tony Luck" <tony.luck@xxxxxxxxx>
Cc: "David Carrillo-Cisneros" <davidcc@xxxxxxxxxx>
Cc: "Sai Prakhya" <sai.praneeth.prakhya@xxxxxxxxx>
Cc: "Peter Zijlstra" <peterz@xxxxxxxxxxxxx>
Cc: "Stephane Eranian" <eranian@xxxxxxxxxx>
Cc: "Dave Hansen" <dave.hansen@xxxxxxxxx>
Cc: "Shaohua Li" <shli@xxxxxx>
Cc: "Nilay Vaish" <nilayvaish@xxxxxxxxx>
Cc: "Vikas Shivappa" <vikas.shivappa@xxxxxxxxxxxxxxx>
Cc: "Ingo Molnar" <mingo@xxxxxxx>
Cc: "Borislav Petkov" <bp@xxxxxxx>
Cc: "H. Peter Anvin" <h.peter.anvin@xxxxxxxxx>
Link: http://lkml.kernel.org/r/1477142405-32078-7-git-send-email-fenghua.yu@xxxxxxxxx
Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>

---
arch/x86/Kconfig | 12 +++++++++
arch/x86/kernel/cpu/Makefile | 2 ++
arch/x86/kernel/cpu/intel_rdt.c | 54 +++++++++++++++++++++++++++++++++++++++++
3 files changed, 68 insertions(+)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index bada636..770fb5f 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -407,6 +407,18 @@ config GOLDFISH
def_bool y
depends on X86_GOLDFISH

+config INTEL_RDT_A
+ bool "Intel Resource Director Technology Allocation support"
+ default n
+ depends on X86 && CPU_SUP_INTEL
+ help
+ Select to enable resource allocation which is a sub-feature of
+ Intel Resource Director Technology(RDT). More information about
+ RDT can be found in the Intel x86 Architecture Software
+ Developer Manual.
+
+ Say N if unsure.
+
if X86_32
config X86_EXTENDED_PLATFORM
bool "Support for extended (non-PC) x86 platforms"
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 4a8697f..cf4bfd0 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -34,6 +34,8 @@ obj-$(CONFIG_CPU_SUP_CENTAUR) += centaur.o
obj-$(CONFIG_CPU_SUP_TRANSMETA_32) += transmeta.o
obj-$(CONFIG_CPU_SUP_UMC_32) += umc.o

+obj-$(CONFIG_INTEL_RDT_A) += intel_rdt.o
+
obj-$(CONFIG_X86_MCE) += mcheck/
obj-$(CONFIG_MTRR) += mtrr/
obj-$(CONFIG_MICROCODE) += microcode/
diff --git a/arch/x86/kernel/cpu/intel_rdt.c b/arch/x86/kernel/cpu/intel_rdt.c
new file mode 100644
index 0000000..7d7aebe
--- /dev/null
+++ b/arch/x86/kernel/cpu/intel_rdt.c
@@ -0,0 +1,54 @@
+/*
+ * Resource Director Technology(RDT)
+ * - Cache Allocation code.
+ *
+ * Copyright (C) 2016 Intel Corporation
+ *
+ * Authors:
+ * Fenghua Yu <fenghua.yu@xxxxxxxxx>
+ * Tony Luck <tony.luck@xxxxxxxxx>
+ * Vikas Shivappa <vikas.shivappa@xxxxxxxxx>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * More information about RDT be found in the Intel (R) x86 Architecture
+ * Software Developer Manual June 2016, volume 3, section 17.17.
+ */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include <linux/slab.h>
+#include <linux/err.h>
+
+static inline bool get_rdt_resources(void)
+{
+ bool ret = false;
+
+ if (!boot_cpu_has(X86_FEATURE_RDT_A))
+ return false;
+ if (boot_cpu_has(X86_FEATURE_CAT_L3))
+ ret = true;
+
+ return ret;
+}
+
+static int __init intel_rdt_late_init(void)
+{
+ if (!get_rdt_resources())
+ return -ENODEV;
+
+ pr_info("Intel RDT cache allocation detected\n");
+ if (boot_cpu_has(X86_FEATURE_CDP_L3))
+ pr_info("Intel RDT code data prioritization detected\n");
+
+ return 0;
+}
+
+late_initcall(intel_rdt_late_init);