Re: [PATCH v4 2/2] fpga: Add support for Lattice iCE40 FPGAs

From: Geert Uytterhoeven
Date: Sun Oct 30 2016 - 15:25:46 EST


On Sat, Oct 29, 2016 at 11:32 PM, Joel Holdsworth
<joel@xxxxxxxxxxxxxxxxxxx> wrote:
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/fpga/lattice-ice40-fpga-mgr.txt
> @@ -0,0 +1,23 @@

> +- cdone-gpio: GPIO connected to CDONE pin
> +- creset_b-gpio: GPIO connected to CRESET_B pin. Note that CRESET_B is
> + treated as an active-low output because the signal is
> + treated as an enable signal, rather than a reset. This
> + is necessary because the FPGA will enter Master SPI
> + mode and drive SCK with a clock signal, potentially
> + jamming other devices on the bus, unless CRESET_B is
> + held high until the firmware is loaded.

Plural, please, like in the previous version, cfr.
Documentation/devicetree/bindings/gpio/gpio.txt:
"GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
of this GPIO for the device. While a non-existent <name> is considered valid
for compatibility reasons (resolving to the "gpios" property), it is
not allowed
for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
bindings use it, but are only supported for compatibility reasons and
should not
be used for newer bindings since it has been deprecated."

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds