Re: [PATCH] gpio: Add Tegra186 support

From: Laxman Dewangan
Date: Fri Nov 25 2016 - 07:28:04 EST

On Thursday 24 November 2016 08:38 PM, Thierry Reding wrote:
* PGP Signed by an unknown key

On Thu, Nov 24, 2016 at 08:14:31PM +0530, Laxman Dewangan wrote:

This has nothing to do with the device tree binding. What the device
tree binding defines is the indices to use to obtain a given GPIO within
a given port. What numbering the driver uses internally is completely up
to the driver implementation.

Oh, and the above works just fine.

Nop, it will not work. The reason is:

#define TEGRA_MAIN_GPIO(port, offset) \
((TEGRA_MAIN_GPIO_PORT_##port * 8) + offset)

so in your DTS file, if you use this macro for the gpio number then you will
have pin per port as 8.
And so your total GPIO is 23 *8 (Port CC) but in source code ngpio is very
Yes, within the source code, ngpio will be the exact number of pins that
the GPIO controller physically exposes. But that still works fine, feel
free to test the driver if you don't believe me. The translation from
one numberspace to the other is done in tegra186_gpio_of_xlate().

OK, so you are mapping the DT gpio number to new number using xlate.

This method is fine but it complicate the driver and always it needs to calculate the base for the port.
If we have one to one mapping then probably, we can have fixed lookup table.

I am just incline to make stuff simple so that we can have better maintainability and debugging. This is very common driver and almost all BSPS engineer debug here so want to make this driver extremely simple.