RE: [patch net / RFC] net: fec: increase frame size limitation to actually available buffer
From: Andy Duan
Date: Wed Nov 30 2016 - 02:35:29 EST
From: Nikita Yushchenko <nikita.yoush@xxxxxxxxxxxxxxxxxx> Sent: Wednesday, November 30, 2016 2:36 PM
>To: Andy Duan <fugang.duan@xxxxxxx>; David S. Miller
><davem@xxxxxxxxxxxxx>; Troy Kisky <troy.kisky@xxxxxxxxxxxxxxxxxxx>;
>Andrew Lunn <andrew@xxxxxxx>; Eric Nelson <eric@xxxxxxxxxx>; Philippe
>Reynes <tremyfr@xxxxxxxxx>; Johannes Berg <johannes@xxxxxxxxxxxxxxxx>;
>Cc: Chris Healy <cphealy@xxxxxxxxx>; Fabio Estevam
>Subject: Re: [patch net / RFC] net: fec: increase frame size limitation to
>actually available buffer
>> But I think it is not necessary since the driver don't support jumbo frame.
>Hardcoded 1522 raises two separate issues.
>(1) When DSA is in use, frames processed by FEC chip contain DSA tag and
>thus can be larger than hardcoded limit of 1522. This issue is not FEC-specific,
>any driver that hardcodes maximum frame size to 1522 (many
>do) will have this issue if used with DSA.
>Clean solution for this must take into account that difference between MTU
>and max frame size is no longer known at compile time. Actually this is the
>case even without DSA, due to VLANs: max frame size is (MTU + 18) without
>VLANs, but (MTU + 22) with VLANs. However currently drivers tend to ignore
>this and hardcode 22. With DSA, 22 is not enough, need to add switch-
>specific tag size to that.
>Not yet sure how to handle this. DSA-specific API to find out tag size could be
>added, but generic solution should handle all cases of dynamic difference
>between MTU and max frame size, not only DSA.
>(2) There is some demand to use larger frames for optimization purposes.
>FEC register fields that limit frame size are 14-bit, thus allowing frames up to
>(4k-1). I'm about to prepare a larger patch:
>- add ndo_change_mtu handler, allowing MTU up to (4k - overhead),
>- set MAX_FL / TRUNC_FL based on configured MTU,
>- if necessary, do buffer reallocation with larger buffers.
>Is this suitable for upstreaming?
>Is there any policy related to handling larger frames?
Of course, welcome to upstream the jumbo frame patches, but hope to also add the transmit jumbo frame, not only receive path, which is helpful for testing with two boards connection.
And, some notes need you to care:
- the maximum jumbo frame should consider the fifo size. Different chip has different fifo size. Like i.MX53 tx and rx share one fifo, i.mx6q/dl/sl have separate 4k fifo for tx and rx, i.mx6sx/i.mx7x have separate 8k fifo for tx and rx.
- rx fifo watermark to generate pause frame in busy loading system to avoid fifo overrun. In general, little pause frames bring better performance, mass of pause frames cause worse performance.