Re: [PATCH 2/6] clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33
From: Maxime Ripard
Date: Wed Dec 14 2016 - 04:32:21 EST
On Wed, Dec 14, 2016 at 04:54:14AM +0800, Icenowy Zheng wrote:
> 13.12.2016, 23:44, "Maxime Ripard" <maxime.ripard@xxxxxxxxxxxxxxxxxx>:
> > On Tue, Dec 13, 2016 at 11:22:48PM +0800, Icenowy Zheng wrote:
> >> The CPUX clock on A33, which is for the Cortex-A7 cores, is designed to
> >> be changeable by changing the rate of PLL_CPUX.
> >> Add CLK_SET_RATE_PARENT flag to this clock.
> >> Signed-off-by: Icenowy Zheng <icenowy@xxxxxxxx>
> > Acked-by: Maxime Ripard <maxime.ripard@xxxxxxxxxxxxxxxxxx>
> Excuse me, have you merged this patch?
Yes, sorry, that's what I meant :)
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
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