Re: [PATCH] serial: 8250_lpss: Unconditionally set PCI master for Quark

From: Jan Kiszka
Date: Mon Jan 09 2017 - 12:00:52 EST


On 2017-01-05 22:54, Andy Shevchenko wrote:
> On Wed, Jan 4, 2017 at 10:48 PM, Jan Kiszka <jan.kiszka@xxxxxxxxxxx> wrote:
>> MSI needs it as well.
>>
>> Should have no practical impact, though, as DMA is always available on
>> the Quark. But given the few users of pci_alloc_irq_vectors so far, this
>> incorrect pattern may spread otherwise.
>>
>
> One question below.
>
> Reviewed-by: Andy Shevchenko <andy.shevchenko@xxxxxxxxx>
>
>> Fixes: 3f3a46951e02 ("serial: 8250_lpss: set PCI master only for private DMA")
>> Signed-off-by: Jan Kiszka <jan.kiszka@xxxxxxxxxxx>
>> ---
>> drivers/tty/serial/8250/8250_lpss.c | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/tty/serial/8250/8250_lpss.c b/drivers/tty/serial/8250/8250_lpss.c
>> index f09f68a..9315197 100644
>> --- a/drivers/tty/serial/8250/8250_lpss.c
>> +++ b/drivers/tty/serial/8250/8250_lpss.c
>> @@ -183,7 +183,6 @@ static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port)
>> if (ret)
>> return;
>>
>> - pci_set_master(pdev);
>> pci_try_set_mwi(pdev);
>
> Does it make sense to move MWI there as well?

TBH, I didn't come across the need to enable this bit so far,
specifically not for doing MSI transactions. Is MWI used at all for MSI
(spec says that MSI is "using a PCI DWORD memory write transaction")?
That question is better answered by someone more familiar with such PCI
details.

Jan

>
>>
>> /* Special DMA address for UART */
>> @@ -216,6 +215,8 @@ static int qrk_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
>> struct pci_dev *pdev = to_pci_dev(port->dev);
>> int ret;
>>
>> + pci_set_master(pdev);
>> +
>> ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
>> if (ret < 0)
>> return ret;
>> --
>> 2.1.4
>
>
>

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