RE: [PATCH v4 3/3] USB3/DWC3: Enable undefined length INCR burst type
From: Jerry Huang
Date: Mon Feb 20 2017 - 03:40:12 EST
> -----Original Message-----
> From: Jerry Huang
> Sent: Friday, February 10, 2017 11:30 PM
> To: 'Felipe Balbi' <balbi@xxxxxxxxxx>; robh+dt@xxxxxxxxxx;
> mark.rutland@xxxxxxx; catalin.marinas@xxxxxxx
> Cc: linux-usb@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx;
> devicetree@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; Rajesh
> Bhagat <rajesh.bhagat@xxxxxxx>
> Subject: RE: [PATCH v4 3/3] USB3/DWC3: Enable undefined length INCR burst
> > >> --
> > >> 220.127.116.11
> > > Hi, Balbi and all guys,
> > > Any comment for these patches? Can they be accepted?
> > Rob had comments which you didn't reply yet. I cannot take this
> > patchset yet ;-)
> I look into his mail again, which was based v3, and I replied it.
> He had different understanding for undefined length burst mode.
> It seems he think for this mode, just setting bit (INCRBrstEna) and don't
> need to set other field.
> However, according to the DWC USB3.0 controller databook, when it is
> undefined length INCR burst mode, we still need to set one max burst type,
> such as INCR8, which means controller will use any length less than or equal
> to this INCR8.
Any comment for it? Ten days passed away again :)