Re: RFC: Getting rid of LTR in VMX
From: Paolo Bonzini
Date: Mon Feb 20 2017 - 17:03:08 EST
> > Yes. But 150-200 clock cycles are nothing compared to the cache misses
> > you get from preemption, so I'd ignore that. Saving 300 clock cycles on
> > userspace exits from TR+GSBASE would be about 5% on my Haswell.
> That's still 5% :)
Yes, 5% on userspace exits is good (though they're rare).
OTOH, 300 clock cycles on preemption are nothing to write home about.