Re: [RFC 7/8] fpga-region: add sysfs interface

[Moritz Fischer]

Alan,

On Mon, Feb 27, 2017 at 12:09 PM, Alan Tull <delicious.quinoa@xxxxxxxxx> wrote:


> First case: embedded FPGA.  The hardware has one FPGA.  The image is
> designed for a specific board, so there's no problem including the
> enumeration in the image.

Agreed.

> Second case: embedded FPGA + a PCIe FPGA.  The image will be specific
> as to whether it goes into the embedded FPGA or the PCIe one.

Agreed.


> Third case: multiple PCIe FPGAs.  The enumeration base will be the
> PCIe bus of the individual FPGA.  If the FPGAs don't have unique pin
> connections, then the images could go on any of the PCie FPGAs.  If
> there are unique pin connections, then the image will be specific to
> the FPGA and having the enumeration data in the image is that much
> more helpful for keeping things straight.  Part of the header could
> specify which specific FPGA it should go on if it is restricted.

Agreed.

> Of course if the FPGAs have > 1 PR regions, most FPGA architectures do
> not have relocatable images so those images will be specific for the
> PR region but not specific to the FPGA except as otherwise noted
> above.
>
> So again, including enumeration data in the bitstream should work
> unless I'm missing something.  What am I missing here?

If you enumeration base is sufficiently smart, I suppose that can work.
What you'd probably want is some sort of extension to the platform bus?

I really need to take another look at how non-dt systems enumerate to
give better feedback on this.

Cheers,

Moritz