Re: [PATCH tip/core/rcu 01/40] rcu: Maintain special bits at bottom of ->dynticks counter

From: Paul E. McKenney
Date: Thu Apr 13 2017 - 12:15:55 EST


On Thu, Apr 13, 2017 at 11:20:44AM +0200, Peter Zijlstra wrote:
> On Wed, Apr 12, 2017 at 10:39:46AM -0700, Paul E. McKenney wrote:
> > Currently, IPIs are used to force other CPUs to invalidate their TLBs
> > in response to a kernel virtual-memory mapping change. This works, but
> > degrades both battery lifetime (for idle CPUs) and real-time response
> > (for nohz_full CPUs), and in addition results in unnecessary IPIs due to
> > the fact that CPUs executing in usermode are unaffected by stale kernel
> > mappings. It would be better to cause a CPU executing in usermode to
> > wait until it is entering kernel mode to do the flush, first to avoid
> > interrupting usemode tasks and second to handle multiple flush requests
> > with a single flush in the case of a long-running user task.
> >
> > This commit therefore reserves a bit at the bottom of the ->dynticks
> > counter, which is checked upon exit from extended quiescent states.
> > If it is set, it is cleared and then a new rcu_eqs_special_exit() macro is
> > invoked, which, if not supplied, is an empty single-pass do-while loop.
> > If this bottom bit is set on -entry- to an extended quiescent state,
> > then a WARN_ON_ONCE() triggers.
> >
> > This bottom bit may be set using a new rcu_eqs_special_set() function,
> > which returns true if the bit was set, or false if the CPU turned
> > out to not be in an extended quiescent state. Please note that this
> > function refuses to set the bit for a non-nohz_full CPU when that CPU
> > is executing in usermode because usermode execution is tracked by RCU
> > as a dyntick-idle extended quiescent state only for nohz_full CPUs.
> >
> > Reported-by: Andy Lutomirski <luto@xxxxxxxxxxxxxx>
>
> Isn't that more a: Requested-by ?

I am not too worried about the distinction. Request a feature, report
the lack of a needed feature, or report a bug, but either way I had to
write the code. ;-)

Thanx, Paul